jens/vhdl
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Refactored after moving of VHDL make

Browse Source
This commit is contained in:
jens
2022-09-07 13:09:41 +02:00
parent cbc093e6e7
commit d3beeb0538
63 changed files with 94 additions and 94 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CPUs/MIPS/ghdl/mips_core.inc
+1 -1
View File
@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
include $(VHDL_MAKE_HOME)/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
lib/CPUs/MIPS/ghdl/tb_mips_top.make
+2 -2
View File
@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
include $(VHDL_MAKE_HOME)/defs.mk
# -----------------------------------------------------------
include mips_core.inc
@@ -34,5 +34,5 @@ TARGET := tb_mips_top
ENTITY := tb_mips_top
RUN_TIME ?= 1500us
include $(VHDL_HOME)/make/ghdl.mk
include $(VHDL_MAKE_HOME)/ghdl.mk
lib/CPUs/MIPS/syn/ise101/Makefile
+1 -1
View File
@@ -4,5 +4,5 @@ PRJ := mips_top
PREQ := $(PRJDIR)/$(PRJ).prj $(PRJDIR)/$(PRJ).xst $(PRJDIR)/$(PRJ).lso
DEVICE := "xc4vsx35-ff668-10"
include $(VHDL_HOME)/make/ise.mk
include $(VHDL_MAKE_HOME)/ise.mk