diff --git a/projects/mips_sys/src/mips_sys.vhd b/projects/mips_sys/src/mips_sys.vhd
index 088d76c..a7036b5 100644
--- a/projects/mips_sys/src/mips_sys.vhd
+++ b/projects/mips_sys/src/mips_sys.vhd
@@ -43,8 +43,7 @@ ENTITY mips_sys IS
 GENERIC
 (
 	sys_freq_in			: real				:= 100.0;
-	sys_freq			: real				:= 125.0;
-	sdram_freq			: real				:= 125.0;
+	sys_freq			: real				:= 100.0;
 	sdram_phaseshift	: integer			:= 0;
 	tsvga				: vga_timespec_t 	:= ts_vga_800_600_60
 
@@ -195,7 +194,7 @@ ARCHITECTURE behavior OF mips_sys IS
 	COMPONENT async_port_wb
 	GENERIC
 	(
-		f_sysclk		: real		:= 100.0;
+		f_sysclk		: real		:= sys_freq;
 		addr_width		: natural	:= 32;
 		data_width		: natural	:= 32;
 		byte_sel_width	: natural	:= 4;
@@ -250,7 +249,7 @@ ARCHITECTURE behavior OF mips_sys IS
 	COMPONENT gpio_wb
 	Generic
 	(
-		f_sysclk	: real := 100.0
+		f_sysclk	: real := sys_freq
 	);
 	PORT
 	(
@@ -891,7 +890,7 @@ inst_sdram_ctrl_frontend_wb : entity work.sdram_ctrl_frontend64_wb
 	(
 		BL					=> BURST_LEN,
 		f_sysclk			=> sys_freq,
-		f_sdrclk			=> sdram_freq,
+		f_sdrclk			=> sys_freq,
 		fifo_depth			=> 5
 	)
 	PORT MAP