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- Minor changes

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Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@260 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-01-18 22:08:26 +00:00
parent 73f7a85646
commit cfb87bf755
2 changed files with 52 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files
projects/mips_sys/sim/tb_mips_sys.fdo
+6 -5
View File
@@ -34,9 +34,9 @@ vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_bcu.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_pipeline.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_muldiv.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_cop.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/dcache.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/icache.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_bui.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_dcache.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_icache.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_biu.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_top.vhd"
vcom -explicit -93 "../src/ram_sim.vhd"
vcom -explicit -93 "../src/bootloader.ROM.vhd"
@@ -68,9 +68,10 @@ vcom -explicit -93 "../../../lib/misc/gpio_wb.vhd"
vcom -explicit -93 "../../../lib/misc/lcd_port.vhd"
# Flash and USB
vcom -explicit -93 "../src/sys_types.vhd"
vcom -explicit -93 "../../../lib/misc/async_types.vhd"
vcom -explicit -93 "../../../lib/misc/async_port_wb.vhd"
vcom -explicit -93 "../../../lib/misc/flash_port_wb.vhd"
vcom -explicit -93 "../src/async_defs.vhd"
# Sync SRAM
vcom -explicit -93 "../../../lib/SSRAM/src/package_utility.vhd"
@@ -102,4 +103,4 @@ do {tb_mips_sys.wdo}
view wave
view structure
view signals
run 20ms
run 50ms
projects/mips_sys/sim/tb_mips_sys.wdo
+46 -6
View File
@@ -44,10 +44,46 @@ add wave -noupdate -divider Arbiter
add wave -noupdate -format Literal /tb_mips_sys/uut/arb_idx
add wave -noupdate -format Literal /tb_mips_sys/uut/arb_req
add wave -noupdate -format Literal /tb_mips_sys/uut/arb_gnt
add wave -noupdate -divider AC97
add wave -noupdate -format Logic /tb_mips_sys/uut/sys_ac97_sdata_in
add wave -noupdate -format Logic /tb_mips_sys/uut/sys_ac97_bit_clk
add wave -noupdate -format Logic /tb_mips_sys/uut/sys_ac97_sdata_out
add wave -noupdate -format Logic /tb_mips_sys/uut/sys_ac97_ssync
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/cmd_reg_we
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/cmd_pending
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/stat_valid
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/stat_pending
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/rx_frame_valid
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/sync_frame
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/sync_tx
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/sync_status
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_ac97_wb/request
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/tx_data_start
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/rx_data_start
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_ac97_wb/ac97_stat
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/int_en_frame_sync
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/int_en_rx
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/int_en_tx
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/rx_fifo_re
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/rx_fifo_we
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/rx_fifo_full
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/rx_fifo_empty
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/rx_fifo_almost_full
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/rx_fifo_almost_empty
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_ac97_wb/rx_fifo_din
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_ac97_wb/rx_fifo_dout
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/tx_fifo_re
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/tx_fifo_we
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/tx_fifo_full
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/tx_fifo_empty
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/tx_fifo_almost_full
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_ac97_wb/tx_fifo_almost_empty
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_ac97_wb/tx_fifo_din
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_ac97_wb/tx_fifo_dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/ac_frame_reg
add wave -noupdate -format Logic /tb_mips_sys/uut/sys_ac97_ssync
add wave -noupdate -format Logic /tb_mips_sys/uut/sys_ac97_bit_clk
add wave -noupdate -format Logic /tb_mips_sys/ac_synced
add wave -noupdate -divider {CPU Master}
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/mdat_i
@@ -175,20 +211,22 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/status_save
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/status_rest
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/exception
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/test_reg
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/test_reg_we
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ir
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ir_valid
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/din
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/dout
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/stat_reg_we
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_in
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_out
add wave -noupdate -format Literal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_out
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/exc_state
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/eflags_reg_we
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/eflags
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/cpu_run
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_reg_dual/reg_mem
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_reg_dual/reg_mem
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/id_stage
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/id_stage
add wave -noupdate -format Logic -label .exc_commit /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_out.exc_commit
add wave -noupdate -format Logic -label .exc_pending /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_out.exc_pending
add wave -noupdate -format Logic -label .exc_exit /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_out.exc_exit
@@ -205,6 +243,8 @@ add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dc
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/mem_stage
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/dout
add wave -noupdate -format Logic -label .cop_read /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_cop/ctrl_out.cop_read
add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
add wave -noupdate -format Logic /tb_mips_sys/uut/clk
add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/wb_stage
@@ -303,7 +343,7 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/tram_re
add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/tram_we
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 2} {49999842932 ps} 0} {{Cursor 100} {5918510756 ps} 0}
WaveRestoreCursors {{Cursor 2} {23579127600 ps} 0} {{Cursor 100} {5544988254 ps} 0}
configure wave -namecolwidth 187
configure wave -valuecolwidth 64
configure wave -justifyvalue left
@@ -317,4 +357,4 @@ configure wave -gridperiod 100
configure wave -griddelta 40
configure wave -timeline 1
update
WaveRestoreZoom {1454075947 ps} {11432056635 ps}
WaveRestoreZoom {0 ps} {37535226330 ps}