diff --git a/lib/CPUs/MIPS/src/core/mips_bcu.vhd b/lib/CPUs/MIPS/src/core/mips_bcu.vhd
index 1bb28bd..bddfa7b 100644
--- a/lib/CPUs/MIPS/src/core/mips_bcu.vhd
+++ b/lib/CPUs/MIPS/src/core/mips_bcu.vhd
@@ -45,7 +45,7 @@ architecture Behavioral of bcu is
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 begin
 
-	flags.eq	<= '1' when ((op1_in xor op2_in) = (data_width-1 downto 0 => '0')) else '0' after 3 ns;
+	flags.eq	<= '1' when ((op1_in xor op2_in) = (data_width-1 downto 0 => '0')) else '0' after 1 ns;
 	flags.ltz	<= op1_in(op1_in'left) after 1 ns;
 
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