From cb25248c3f79ea963e35747f8cad92cf998992e4 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Fri, 20 Jan 2017 18:41:25 +0000 Subject: [PATCH] [DE0-Nano] - increased CPU reset duration git-svn-id: http://moon:8086/svn/vhdl/trunk@1374 cc03376c-175c-47c8-b038-4cd826a8556b --- projects/mips_de0_nano/quartus/mips/mips_sys.vhd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/mips_de0_nano/quartus/mips/mips_sys.vhd b/projects/mips_de0_nano/quartus/mips/mips_sys.vhd index b28cf7d..d5d2ff6 100644 --- a/projects/mips_de0_nano/quartus/mips/mips_sys.vhd +++ b/projects/mips_de0_nano/quartus/mips/mips_sys.vhd @@ -134,7 +134,7 @@ ARCHITECTURE behavior OF mips_sys IS signal cpu_rst : STD_LOGIC := '1'; -- pre-init for POR signal sys_rst : STD_LOGIC := '1'; -- pre-init for POR - signal cpu_rst_count : unsigned(23 downto 0) := (others => '1'); -- pre-init for POR + signal cpu_rst_count : unsigned(24 downto 0) := (others => '1'); -- pre-init for POR signal sys_rst_count : unsigned(7 downto 0) := (others => '1'); -- pre-init for POR BEGIN