diff --git a/lib/CPUs/MIPS/dist/tmpl/mips_sys.vhd b/lib/CPUs/MIPS/dist/tmpl/mips_sys.vhd
index 9780661..3f34fcf 100644
--- a/lib/CPUs/MIPS/dist/tmpl/mips_sys.vhd
+++ b/lib/CPUs/MIPS/dist/tmpl/mips_sys.vhd
@@ -42,6 +42,8 @@ ENTITY mips_sys IS
 	);
 	PORT
 	(
+		eb				: in  std_logic;
+		nmi				: in  std_logic;
 		rst				: in  std_logic;
 		clk				: in  std_logic;
 		flash_cs_n		: out std_logic;
@@ -112,7 +114,7 @@ ARCHITECTURE behavior OF mips_sys IS
 	signal SRDY_O_uart	: std_logic;
 	signal DAT_O_uart	: unsigned(31 downto 0);
 
-	signal int_uart_rx	: std_logic;
+	signal int_uart		: std_logic;
 
 	type mem_area_t is (mem_dead, mem_flash, mem_sram, mem_rom, mem_gpio, mem_uart);
 	signal mem_area : mem_area_t;
@@ -197,6 +199,8 @@ inst_mips_top: entity work.mips_top
 	PORT MAP
 	(
 		debug	=> debug,
+		nmi		=> nmi,
+		eb		=> eb,
 		RST_I	=> rst,
 		CLK_I	=> clk,
 		ACK_I	=> ACK_I,
@@ -211,7 +215,7 @@ inst_mips_top: entity work.mips_top
 		MRDY_O	=> MRDY_O,
 		INT		=> INT
 	);
-	INT(1)	<= int_uart_rx;
+	INT(1)	<= int_uart;
 	
 inst_rom : entity work.rom_wb
 	PORT MAP
@@ -326,8 +330,7 @@ inst_uart : entity work.uart_wb
 		ADDR_I		=> ADDR_O,
 		DAT_I		=> DAT_O,
 		DAT_O		=> DAT_O_uart,
-		INT_RX_O	=> int_uart_rx,
-		INT_TX_O	=> open,
+		INT_O		=> int_uart,
 		ser_rx		=> rx,
 		ser_tx		=> tx
 	);