- added Altera/De0-NAno implementation

git-svn-id: http://moon:8086/svn/vhdl/trunk@1256 cc03376c-175c-47c8-b038-4cd826a8556b

lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_sdr_wb32.wdo

@@ -69,7 +69,6 @@ add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/sd_cmd
 add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/part_addr
 add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/part_data
-add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/enable
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/tag
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/col_addr
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/mode_word
@@ -100,7 +99,6 @@ add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/sdr_cmd
 add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/sdr_cmd_we
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/sdr_mode
-add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/sdr_cke
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/st_ctrl
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/st_ctrl_next
 add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/pwr_up_cnt

lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_sdr_wb32_de0nano.fdo

@@ -0,0 +1,33 @@
+## NOTE:  Do not edit this file.
+##
+if {[file exists work]} {vdel -lib work -all}
+
+vlib work
+vcom -explicit  -93 "../../../FIFO/src/fifo_ctrl_pkg.vhd"
+vcom -explicit  -93 "../../../rams/dpram_1w1r2c_ra_sim.vhd"
+vcom -explicit  -93 "../../../FIFO/src/gray_counter.vhd"
+vcom -explicit  -93 "../../../FIFO/src/fifo_async_ctrl.vhd"
+vcom -explicit  -93 "../../../FIFO/src/fifo_async.vhd"
+vcom -explicit  -93 "../../../FIFO/src/fifo_sync_ctrl.vhd"
+vcom -explicit  -93 "../../../FIFO/src/fifo_sync.vhd"
+vcom -explicit  -93 "../../../misc/utils_pkg.vhd"
+vcom -explicit  -93 "../src/sdram_const.vhd"
+vcom -explicit  -93 "../src/sdram_config_mt48lc16m16.vhd"
+vcom -explicit  -93 "../src/sdram_types.vhd"
+vcom -explicit  -93 "../src/sdram_cmd.vhd"
+vcom -explicit  -93 "../src/sdram_ctrl.vhd"
+vcom -explicit  -93 "../src/sdr_clk_cycloneive.vhd"
+vcom -explicit  -93 "../src/sdr_phy_de0nano.vhd"
+vcom -explicit  -93 "../src/sdram_ctrl_top.vhd"
+vcom -explicit  -93 "../src/sdram_ctrl_frontend_wb16.vhd"
+vcom -explicit  -93 "../src/ctrl_sdr_wb32.vhd"
+vcom -explicit  -93 "../src/mti_pkg.vhd"
+vcom -explicit  -93 "../src/mt48lc16m16a2.vhd"
+vcom -explicit  -93 "../src/tb_ctrl_sdr_wb32.vhd"
+
+vsim -t 1ps   -lib work tb_ctrl_sdr_wb32
+do {tb_ctrl_sdr_wb32_de0nano.wdo}
+view wave
+view structure
+view signals
+run 120us

lib/SDRAM/ddr_sdr_v1_5/sim/tb_ctrl_sdr_wb32_de0nano.wdo

@@ -0,0 +1,147 @@
+onerror {resume}
+quietly WaveActivateNextPane {} 0
+add wave -noupdate -divider J-Bus
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/clk_o
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/rst_o
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/cyc_o
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/stb_o
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/we_o
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/sel_o
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/ack_i
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/mrdy_o
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/srdy_i
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/addr_o
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/dat_i
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/dat_o
+add wave -noupdate -divider Test
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/dout_rst
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/dout_reg
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/dout_cnt
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/sd_cmd
+add wave -noupdate -divider SDRAM
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/sdclk
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/sdclk_fb
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/part_clk
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/part_cke
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/part_cs_n
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/part_we_n
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/part_ras_n
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/part_cas_n
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/part_ba
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/part_dqm
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/sd_cmd
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/part_addr
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/part_data
+add wave -noupdate -divider PHY
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/f_sdrclk
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/rst
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/clk
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/clk_fb
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/clk0_out
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/rst0_out
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/phy_in
+add wave -noupdate -format Literal -radix hexadecimal -expand /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/phy_out
+add wave -noupdate -format Literal -expand /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/phy_ctrl
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_clk
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_dqm
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/clk0_rd
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_data
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_ba
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_addr
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_cs_n
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_we_n
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_cas_n
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_ras_n
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_cke
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/drive
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/data_reg_r
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/part_ctrl_reg
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/we_reg
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/clk0
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/rst0
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/locked
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/error
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/inst_sdram_phy/u_tag_pipe
+add wave -noupdate -divider {CMD FSM}
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/f_sdrclk
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/rst
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/clk
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/sd_cmd
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/part_addr
+add wave -noupdate -format Literal -radix hexadecimal /tb_ctrl_sdr_wb32/part_data
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/tag
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/col_addr
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/mode_word
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/cmd
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/cmd_we
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/cmd_ack
+add wave -noupdate -format Literal -expand /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/phy_ctrl
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/st_sdr
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/st_sdr_next
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/cc_load_en
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/cycle_finished
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/cycle_cnt
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/burst_load_en
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/burst_finished
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_cmd/burst_cnt
+add wave -noupdate -divider {Main FSM}
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/f_sysclk
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/rst
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/clk
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/u_busy
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/u_tag_in
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/u_tag_out
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/u_addr
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/u_cmd
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/u_cmd_we
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/col_addr
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/sdr_cmd_busy
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/sdr_cmd
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/sdr_cmd_we
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/sdr_mode
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/st_ctrl
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/st_ctrl_next
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/pwr_up_cnt
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/pwr_up_cnt_rst
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/pwr_up_finished
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/cycle_cnt
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/cc_preset
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/cc_load_en
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/cycle_finished
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/seq_cnt
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/seq_rst_en
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/seq_cnt_en
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/refresh_cnt
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/refresh_request
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/refresh_cnt_rst
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/addr_reg_load_en
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/u_tag_reg
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/bank_addr_reg
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/row_addr_reg
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/col_addr_reg
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/bank_addr_last
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/row_addr_last
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/col_addr_last
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/u_bank_addr
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/u_row_addr
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/u_col_addr
+add wave -noupdate -format Literal /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/bank_active_reg
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/bank_is_active
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/bank_activate
+add wave -noupdate -format Logic /tb_ctrl_sdr_wb32/uut/sdram_ctrl_frontend_wb16/inst_sdram_ctrl_top/inst_sdram_ctrl/bank_clr
+TreeUpdate [SetDefaultTree]
+WaveRestoreCursors {{Cursor 1} {82985000 ps} 0}
+configure wave -namecolwidth 150
+configure wave -valuecolwidth 100
+configure wave -justifyvalue left
+configure wave -signalnamewidth 1
+configure wave -snapdistance 10
+configure wave -datasetprefix 0
+configure wave -rowmargin 4
+configure wave -childrowmargin 2
+configure wave -gridoffset 0
+configure wave -gridperiod 1
+configure wave -griddelta 40
+configure wave -timeline 0
+update
+WaveRestoreZoom {0 ps} {126 us}