From bafe1745c5db7efe12e7148dfb0694f0b956a14e Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sun, 17 May 2015 18:12:03 +0000 Subject: [PATCH] [ICache] - tag_ram_re don't care git-svn-id: http://moon:8086/svn/vhdl/trunk@1113 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/CPUs/MIPS/src/core/mips_icache.vhd | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/CPUs/MIPS/src/core/mips_icache.vhd b/lib/CPUs/MIPS/src/core/mips_icache.vhd index 57c747d..f66cdf0 100644 --- a/lib/CPUs/MIPS/src/core/mips_icache.vhd +++ b/lib/CPUs/MIPS/src/core/mips_icache.vhd @@ -165,7 +165,7 @@ END COMPONENT; signal tag_ram_addr_wr : unsigned(cache_index_width-1 downto 0); signal tag_ram_data_wr : tag_ram_data_t; signal tag_ram_we : std_logic; - signal tag_ram_re : std_logic; +-- signal tag_ram_re : std_logic; signal fill_count : natural range 0 to 2**word_index_width-1; signal fill_count_en : std_logic; @@ -271,8 +271,8 @@ inst_tag_ram : dpram_2w2r2c_ra clk_a => CLK_I, clk_b => CLK_I, re_a => '1', + re_b => '1', we_a => tag_ram_we, - re_b => tag_ram_re, we_b => '0', addr_a => tag_ram_addr_wr, addr_b => tag_ram_addr_rd, @@ -334,7 +334,7 @@ cache_state_next: data_ram_data_wr <= DAT_I; data_ram_we <= fill_count_en and ACK_I; data_ram_re <= (cpu_en or was_miss) and not data_ram_we; - tag_ram_re <= (cpu_en or was_miss) and not data_ram_we; +-- tag_ram_re <= (cpu_en or was_miss) and not data_ram_we; cache_state: process(s, cache_req, cache_miss, cache_miss_inv, flush_count_rdy, fill_count_rdy, request_count_rdy, fill_tag, SRDY_I, invalidate_req, invalidate_all)