Minor changes

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git-svn-id: http://moon:8086/svn/vhdl/trunk@737 cc03376c-175c-47c8-b038-4cd826a8556b

projects/mips_sys/src/mips_sys_sim.vhd

@@ -288,7 +288,7 @@ ARCHITECTURE behavior OF mips_sys IS
 	COMPONENT gpio_wb
 	Generic
 	(
-		f_sysclk	: real := 100.0
+		f_sysclk	: real := sys_freq
 	);
 	PORT
 	(

projects/mips_sys/src/tb_mips_sys.vhd

@@ -31,6 +31,7 @@ library work;
 use work.mips_types.all;
 use work.sdram_config.all;
 use work.sdram_types.all;
+use work.vga_types.all;
 
 ENTITY tb_mips_sys IS
 END tb_mips_sys;
@@ -122,11 +123,13 @@ ARCHITECTURE behavior OF tb_mips_sys IS
 BEGIN
 
 uut: entity work.mips_sys
---	GENERIC MAP
+	GENERIC MAP
---	(
+	(
---		ddr_phaseshift => 90,
+		sys_freq_in			=> 100.000,
---		ddr_frequency_hz => 100E6
+		sys_freq			=> 125.000,
---	)
+		sdram_phaseshift	=> 0,
+		tsvga				=> ts_vga_800_600_72
+	)
 	PORT MAP
 	(
 		sys_rst_n_in			=> sys_rst_n_in,