From b5bf49af28736b828eeafb8c9fbe545aab7be317 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sun, 13 Dec 2015 13:19:37 +0000 Subject: [PATCH] [DDC] - changed frequencies and adjusted CIC bit depths git-svn-id: http://moon:8086/svn/vhdl/trunk@1334 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/radio/ddc/src/tb_ddc.vhd | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/lib/radio/ddc/src/tb_ddc.vhd b/lib/radio/ddc/src/tb_ddc.vhd index e482e23..5069c63 100644 --- a/lib/radio/ddc/src/tb_ddc.vhd +++ b/lib/radio/ddc/src/tb_ddc.vhd @@ -35,9 +35,9 @@ ENTITY tb_ddc IS nbits_out_frac : integer := 30; lo_nbits_phase : integer := 24; lo_nbits_freq : integer := 24; - cic_nstages : integer := 5; + cic_nstages : integer := 9; cic_ratio : integer := 25; - cic_scale_nbits : integer := 22; + cic_scale_nbits : integer := 42; rfgen_nbits_phase : integer := 32; rfgen_nbits_freq : integer := 32 ); @@ -109,9 +109,9 @@ ARCHITECTURE behavior OF tb_ddc IS --Constants constant fa : REAL := 2.0**27; - constant frf1 : REAL := 33.99E6; - constant frf2 : REAL := 2.1E6; - constant frf3 : REAL := 19.01E6; + constant frf1 : REAL := 2.1E6; + constant frf2 : REAL := 3.1E6; + constant frf3 : REAL := 4.3E6; constant flo : REAL := 2.00E6; constant PERIOD : time := 10 ns;