From b12bb21d64ada970da8451d421057976ce7595ad Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sat, 24 Aug 2013 16:34:44 +0000 Subject: [PATCH] - added timing constraints Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@1021 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/CPUs/MIPS/syn/ise101/constraints/mips_top.xcf | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/lib/CPUs/MIPS/syn/ise101/constraints/mips_top.xcf b/lib/CPUs/MIPS/syn/ise101/constraints/mips_top.xcf index 5d908f7..1c877f4 100644 --- a/lib/CPUs/MIPS/syn/ise101/constraints/mips_top.xcf +++ b/lib/CPUs/MIPS/syn/ise101/constraints/mips_top.xcf @@ -1,3 +1,10 @@ +# Bus clock nets +NET "CLK_I" TNM_NET = "sys_clk"; +TIMESPEC "TS_clk" = PERIOD "sys_clk" 9.9 ns HIGH 50 %; + +NET "cpu_clk" TNM_NET = "cpu_clk"; +TIMESPEC "TS_cpu_clk" = PERIOD "cpu_clk" 9.9 ns HIGH 50 %; + BEGIN MODEL biu INST inst_bin_fifo ram_style = distributed; INST inst_bout_fifo ram_style = distributed;