diff --git a/projects/mips_de0_nano/quartus/mips/JMips.cof b/projects/mips_de0_nano/quartus/mips/JMips.cof
new file mode 100644
index 0000000..c3a5929
--- /dev/null
+++ b/projects/mips_de0_nano/quartus/mips/JMips.cof
@@ -0,0 +1,37 @@
+<?xml version="1.0" encoding="US-ASCII" standalone="yes"?>
+<cof>
+	<eprom_name>EPCS64</eprom_name>
+	<flash_loader_device>EP4CE22</flash_loader_device>
+	<output_filename>output_files/JMips.jic</output_filename>
+	<n_pages>1</n_pages>
+	<width>1</width>
+	<mode>7</mode>
+	<hex_block>
+		<hex_filename>Z:/work/repos/mips/src/dhry.elf.hex</hex_filename>
+		<hex_addressing>relative</hex_addressing>
+		<hex_offset>1048576</hex_offset>
+	</hex_block>
+	<sof_data>
+		<start_address>00000000</start_address>
+		<user_name>Page_0</user_name>
+		<page_flags>1</page_flags>
+		<bit0>
+			<sof_filename>output_files/JMips.sof<compress_bitstream>1</compress_bitstream></sof_filename> 
+		</bit0>
+	</sof_data>
+	<version>7</version>
+	<create_cvp_file>0</create_cvp_file>
+	<create_hps_iocsr>0</create_hps_iocsr>
+	<auto_create_rpd>0</auto_create_rpd>
+	<options>
+		<map_file>1</map_file>
+	</options>
+	<advanced_options>
+		<ignore_epcs_id_check>0</ignore_epcs_id_check>
+		<ignore_condone_check>2</ignore_condone_check>
+		<plc_adjustment>0</plc_adjustment>
+		<post_chain_bitstream_pad_bytes>-1</post_chain_bitstream_pad_bytes>
+		<post_device_bitstream_pad_bytes>-1</post_device_bitstream_pad_bytes>
+		<bitslice_pre_padding>1</bitslice_pre_padding>
+	</advanced_options>
+</cof>
\ No newline at end of file
diff --git a/projects/mips_de0_nano/quartus/mips/VJ-UART.lnk b/projects/mips_de0_nano/quartus/mips/VJ-UART.lnk
index abba77f..47a8ebb 100644
Binary files a/projects/mips_de0_nano/quartus/mips/VJ-UART.lnk and b/projects/mips_de0_nano/quartus/mips/VJ-UART.lnk differ
diff --git a/projects/mips_de0_nano/quartus/mips/mips_sys.vhd b/projects/mips_de0_nano/quartus/mips/mips_sys.vhd
index 0e31f09..d9aba2f 100644
--- a/projects/mips_de0_nano/quartus/mips/mips_sys.vhd
+++ b/projects/mips_de0_nano/quartus/mips/mips_sys.vhd
@@ -328,6 +328,12 @@ inst_gpio : entity work.gpio_wb
 	);
 
 inst_uart : entity work.uart_wb
+	GENERIC MAP 
+	(
+		f_sysclk			=> F_SYSCLK,
+		baudrate_default	=> 115200.0,
+		fifo_depth_bits		=> 4
+	)
 	PORT MAP
 	(
 		CLK_I		=> sys_clk,