From a927b88db399ee47ac846efd27b4d2a22fbd6e84 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sun, 18 Aug 2013 09:07:29 +0000 Subject: [PATCH] - paths adjusted Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/branches/BRANCH_MIPS_TLB@1013 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/CPUs/MIPS/sim/tb_mips_biu.fdo | 20 +- lib/CPUs/MIPS/sim/tb_mips_biu.wdo | 288 ++++++++-------- lib/CPUs/MIPS/sim/tb_mips_cam.fdo | 6 +- lib/CPUs/MIPS/sim/tb_mips_cam.wdo | 22 +- lib/CPUs/MIPS/sim/tb_mips_dcache.fdo | 16 +- lib/CPUs/MIPS/sim/tb_mips_dcache.wdo | 484 +++++++++++++-------------- lib/CPUs/MIPS/sim/tb_mips_icache.fdo | 16 +- lib/CPUs/MIPS/sim/tb_mips_icache.wdo | 282 ++++++++-------- 8 files changed, 565 insertions(+), 569 deletions(-) diff --git a/lib/CPUs/MIPS/sim/tb_mips_biu.fdo b/lib/CPUs/MIPS/sim/tb_mips_biu.fdo index 9e2923f..7f12851 100644 --- a/lib/CPUs/MIPS/sim/tb_mips_biu.fdo +++ b/lib/CPUs/MIPS/sim/tb_mips_biu.fdo @@ -3,8 +3,8 @@ vlib work # Packages -vcom -explicit -93 "../src/core/TLB/mips_util_pkg.vhd" -vcom -explicit -93 "../src/core/TLB/mips_types.vhd" +vcom -explicit -93 "../src/core/mips_util_pkg.vhd" +vcom -explicit -93 "../src/core/mips_types.vhd" vcom -explicit -93 "../../../misc/utils_pkg.vhd" vcom -explicit -93 "../../../JBUS/src/busmaster_types.vhd" @@ -28,20 +28,20 @@ vcom -explicit -93 "../../../FIFO/src/fifo_async_ctrl.vhd" vcom -explicit -93 "../../../FIFO/src/fifo_async.vhd" # MIPS Cache -vcom -explicit -93 "../src/core/TLB/mips_icache.vhd" -vcom -explicit -93 "../src/core/TLB/mips_dcache.vhd" +vcom -explicit -93 "../src/core/mips_icache.vhd" +vcom -explicit -93 "../src/core/mips_dcache.vhd" # MIPS TLB -vcom -explicit -93 "../src/core/TLB/mips_tlb_block.vhd" -vcom -explicit -93 "../src/core/TLB/mips_tlb.vhd" +vcom -explicit -93 "../src/core/mips_cam.vhd" +vcom -explicit -93 "../src/core/mips_tlb.vhd" # Busmaster vcom -explicit -93 "../../../JBUS/src/busmaster_async.vhd" -vcom -explicit -93 "../src/core/TLB/mips_biu.vhd" -vcom -explicit -93 "../src/tb_mips_biu_tlb.vhd" +vcom -explicit -93 "../src/core/mips_biu.vhd" +vcom -explicit -93 "../src/tb_mips_biu.vhd" -vsim -t 1ps -lib work tb_biu_tlb -do {tb_mips_biu_tlb.wdo} +vsim -t 1ps -lib work tb_biu +do {tb_mips_biu.wdo} view wave view structure view signals diff --git a/lib/CPUs/MIPS/sim/tb_mips_biu.wdo b/lib/CPUs/MIPS/sim/tb_mips_biu.wdo index ed4cb3e..c447517 100644 --- a/lib/CPUs/MIPS/sim/tb_mips_biu.wdo +++ b/lib/CPUs/MIPS/sim/tb_mips_biu.wdo @@ -1,153 +1,149 @@ onerror {resume} quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_biu_tlb/clk -add wave -noupdate -format Logic /tb_biu_tlb/rst -add wave -noupdate -format Logic /tb_biu_tlb/int_o -add wave -noupdate -format Logic /tb_biu_tlb/cyc_o -add wave -noupdate -format Logic /tb_biu_tlb/stb_o -add wave -noupdate -format Logic /tb_biu_tlb/we_o -add wave -noupdate -format Literal /tb_biu_tlb/sel_o -add wave -noupdate -format Logic /tb_biu_tlb/ack_i -add wave -noupdate -format Logic /tb_biu_tlb/mrdy_o -add wave -noupdate -format Logic /tb_biu_tlb/srdy_i -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/addr_o -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/mdat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/mdat_o -add wave -noupdate -format Literal /tb_biu_tlb/index_in -add wave -noupdate -format Logic /tb_biu_tlb/entry_we -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/entry_lo_in -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/entry_hi_in -add wave -noupdate -format Literal /tb_biu_tlb/index_out -add wave -noupdate -format Logic /tb_biu_tlb/entry_re -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/entry_lo_out -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/entry_hi_out -add wave -noupdate -format Logic /tb_biu_tlb/cpu_imem_err -add wave -noupdate -format Logic /tb_biu_tlb/cpu_imem_en -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/cpu_imem_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/cpu_imem_dout -add wave -noupdate -format Logic /tb_biu_tlb/cpu_imem_rdy -add wave -noupdate -format Logic /tb_biu_tlb/cpu_dmem_err -add wave -noupdate -format Logic /tb_biu_tlb/cpu_dmem_en -add wave -noupdate -format Logic /tb_biu_tlb/cpu_dmem_we -add wave -noupdate -format Literal /tb_biu_tlb/cpu_dmem_addr -add wave -noupdate -format Literal /tb_biu_tlb/cpu_dmem_be -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/cpu_dmem_din -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/cpu_dmem_dout -add wave -noupdate -format Logic /tb_biu_tlb/cpu_dmem_rdy -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/ctrl_in -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/ctrl_out +add wave -noupdate -format Logic /tb_biu/clk +add wave -noupdate -format Logic /tb_biu/rst +add wave -noupdate -format Logic /tb_biu/int_o +add wave -noupdate -format Logic /tb_biu/cyc_o +add wave -noupdate -format Logic /tb_biu/stb_o +add wave -noupdate -format Logic /tb_biu/we_o +add wave -noupdate -format Literal /tb_biu/sel_o +add wave -noupdate -format Logic /tb_biu/ack_i +add wave -noupdate -format Logic /tb_biu/mrdy_o +add wave -noupdate -format Logic /tb_biu/srdy_i +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/addr_o +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/mdat_i +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/mdat_o +add wave -noupdate -format Literal /tb_biu/index_in +add wave -noupdate -format Logic /tb_biu/entry_we +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/entry_lo_in +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/entry_hi_in +add wave -noupdate -format Literal /tb_biu/index_out +add wave -noupdate -format Logic /tb_biu/entry_re +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/entry_lo_out +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/entry_hi_out +add wave -noupdate -format Logic /tb_biu/cpu_imem_err +add wave -noupdate -format Logic /tb_biu/cpu_imem_en +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/cpu_imem_addr +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/cpu_imem_dout +add wave -noupdate -format Logic /tb_biu/cpu_imem_rdy +add wave -noupdate -format Logic /tb_biu/cpu_dmem_err +add wave -noupdate -format Logic /tb_biu/cpu_dmem_en +add wave -noupdate -format Logic /tb_biu/cpu_dmem_we +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/cpu_dmem_addr +add wave -noupdate -format Literal /tb_biu/cpu_dmem_be +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/cpu_dmem_din +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/cpu_dmem_dout +add wave -noupdate -format Logic /tb_biu/cpu_dmem_rdy +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/ctrl_in +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/ctrl_out add wave -noupdate -divider BIU -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/clk_i -add wave -noupdate -format Logic /tb_biu_tlb/cpu_imem_din_vld -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/cpu_imem_din_reg -add wave -noupdate -format Logic /tb_biu_tlb/cpu_dmem_din_vld -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/cpu_dmem_din_reg -add wave -noupdate -format Literal /tb_biu_tlb/op_descr -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/imem_err -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/imem_rdy -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/imem_en -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/imem_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/imem_dout -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/dmem_err -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/dmem_rdy -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/dmem_en -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/dmem_we -add wave -noupdate -format Literal /tb_biu_tlb/inst_biu/dmem_be -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/dmem_din -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/dmem_dout -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/dmem_addr -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/rst_i -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/clk_i -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/srdy_i -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/stb_o -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/addr_o -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/mdat_i -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/ack_i -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/mdat_o -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/we_o -add wave -noupdate -format Literal /tb_biu_tlb/inst_biu/sel_o -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/cyc_o -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/mrdy_o -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/ctrl_in -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/ctrl_out -add wave -noupdate -format Literal /tb_biu_tlb/inst_biu/s -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/bus_idle -add wave -noupdate -format Literal /tb_biu_tlb/inst_biu/bus_timeout_cnt -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/bus_timeout -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/rst -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/clk -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/bus_din -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/bus_din_rdy -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/bus_din_we -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/bus_dout -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/bus_dout_vld -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/bus_dout_re -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/bus_cmd_cycle_en -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/bus_cmd_rdy -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/bus_cmd_we -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/bus_cmd -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/bus_cyc_complete -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/i_bus_din_rdy -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/i_bus_cmd_rdy -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/i_bus_cmd_we -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/i_bus_cmd_cycle_en -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/i_bus_cmd -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/i_tlb_in -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/i_tlb_out -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/d_bus_din_rdy -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/d_bus_cmd_rdy -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/d_bus_cmd_we -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/d_bus_cmd_cycle_en -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/d_bus_cmd -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/d_tlb_in -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/d_tlb_out -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/icache_bus_gnt -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/dcache_bus_gnt +add wave -noupdate -format Logic /tb_biu/inst_biu/clk_i +add wave -noupdate -format Logic /tb_biu/cpu_imem_din_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/cpu_imem_din_reg +add wave -noupdate -format Logic /tb_biu/cpu_dmem_din_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/cpu_dmem_din_reg +add wave -noupdate -format Literal /tb_biu/op_descr +add wave -noupdate -format Logic /tb_biu/inst_biu/imem_err +add wave -noupdate -format Logic /tb_biu/inst_biu/imem_rdy +add wave -noupdate -format Logic /tb_biu/inst_biu/imem_en +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/imem_addr +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/imem_dout +add wave -noupdate -format Logic /tb_biu/inst_biu/dmem_err +add wave -noupdate -format Logic /tb_biu/inst_biu/dmem_rdy +add wave -noupdate -format Logic /tb_biu/inst_biu/dmem_en +add wave -noupdate -format Logic /tb_biu/inst_biu/dmem_we +add wave -noupdate -format Literal /tb_biu/inst_biu/dmem_be +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/dmem_din +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/dmem_dout +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/dmem_addr +add wave -noupdate -format Logic /tb_biu/inst_biu/rst_i +add wave -noupdate -format Logic /tb_biu/inst_biu/clk_i +add wave -noupdate -format Logic /tb_biu/inst_biu/srdy_i +add wave -noupdate -format Logic /tb_biu/inst_biu/stb_o +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/addr_o +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/mdat_i +add wave -noupdate -format Logic /tb_biu/inst_biu/ack_i +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/mdat_o +add wave -noupdate -format Logic /tb_biu/inst_biu/we_o +add wave -noupdate -format Literal /tb_biu/inst_biu/sel_o +add wave -noupdate -format Logic /tb_biu/inst_biu/cyc_o +add wave -noupdate -format Logic /tb_biu/inst_biu/mrdy_o +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/ctrl_in +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/ctrl_out +add wave -noupdate -format Literal /tb_biu/inst_biu/s +add wave -noupdate -format Logic /tb_biu/inst_biu/bus_idle +add wave -noupdate -format Literal /tb_biu/inst_biu/bus_timeout_cnt +add wave -noupdate -format Logic /tb_biu/inst_biu/bus_timeout +add wave -noupdate -format Logic /tb_biu/inst_biu/rst +add wave -noupdate -format Logic /tb_biu/inst_biu/clk +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/bus_din +add wave -noupdate -format Logic /tb_biu/inst_biu/bus_din_rdy +add wave -noupdate -format Logic /tb_biu/inst_biu/bus_din_we +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/bus_dout +add wave -noupdate -format Logic /tb_biu/inst_biu/bus_dout_vld +add wave -noupdate -format Logic /tb_biu/inst_biu/bus_dout_re +add wave -noupdate -format Logic /tb_biu/inst_biu/bus_cmd_cycle_en +add wave -noupdate -format Logic /tb_biu/inst_biu/bus_cmd_rdy +add wave -noupdate -format Logic /tb_biu/inst_biu/bus_cmd_we +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/bus_cmd +add wave -noupdate -format Logic /tb_biu/inst_biu/bus_cyc_complete +add wave -noupdate -format Logic /tb_biu/inst_biu/i_bus_din_rdy +add wave -noupdate -format Logic /tb_biu/inst_biu/i_bus_cmd_rdy +add wave -noupdate -format Logic /tb_biu/inst_biu/i_bus_cmd_we +add wave -noupdate -format Logic /tb_biu/inst_biu/i_bus_cmd_cycle_en +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/i_bus_cmd +add wave -noupdate -format Logic /tb_biu/inst_biu/d_bus_din_rdy +add wave -noupdate -format Logic /tb_biu/inst_biu/d_bus_cmd_rdy +add wave -noupdate -format Logic /tb_biu/inst_biu/d_bus_cmd_we +add wave -noupdate -format Logic /tb_biu/inst_biu/d_bus_cmd_cycle_en +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/d_bus_cmd +add wave -noupdate -format Logic /tb_biu/inst_biu/icache_bus_gnt +add wave -noupdate -format Logic /tb_biu/inst_biu/dcache_bus_gnt add wave -noupdate -divider BUS-Master -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/clk -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/rst -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cmd_cycle_finished -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cmd_cycle_en -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cmd_rdy -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cmd_we -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/inst_busmaster/cmd_in -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/inst_busmaster/din -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/din_rdy -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/din_we -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/inst_busmaster/dout -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/dout_vld -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/dout_re -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/ack_i -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/inst_busmaster/mdat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/inst_busmaster/mdat_o -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/srdy_i -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/stb_o -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/inst_busmaster/addr_o -add wave -noupdate -format Literal /tb_biu_tlb/inst_biu/inst_busmaster/sel_o -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/we_o -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cyc_o -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/mrdy_o -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/inst_busmaster/cmd_fifo_din -add wave -noupdate -format Literal -radix hexadecimal /tb_biu_tlb/inst_biu/inst_busmaster/cmd_fifo_dout -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cmd_fifo_re -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cmd_fifo_we -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cmd_fifo_full -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cmd_fifo_empty -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/read_fifo_re -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/read_fifo_we -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/read_fifo_full -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/read_fifo_empty -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/write_fifo_re -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/write_fifo_we -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/write_fifo_full -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/write_fifo_empty -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cycle_busy -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cmd_en -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/cmd_read_en -add wave -noupdate -format Literal /tb_biu_tlb/inst_biu/inst_busmaster/read_cnt -add wave -noupdate -format Logic /tb_biu_tlb/inst_biu/inst_busmaster/write +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/clk +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/rst +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cmd_cycle_finished +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cmd_cycle_en +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cmd_rdy +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cmd_we +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/inst_busmaster/cmd_in +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/inst_busmaster/din +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/din_rdy +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/din_we +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/inst_busmaster/dout +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/dout_vld +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/dout_re +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/ack_i +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/inst_busmaster/mdat_i +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/inst_busmaster/mdat_o +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/srdy_i +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/stb_o +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/inst_busmaster/addr_o +add wave -noupdate -format Literal /tb_biu/inst_biu/inst_busmaster/sel_o +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/we_o +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cyc_o +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/mrdy_o +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/inst_busmaster/cmd_fifo_din +add wave -noupdate -format Literal -radix hexadecimal /tb_biu/inst_biu/inst_busmaster/cmd_fifo_dout +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cmd_fifo_re +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cmd_fifo_we +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cmd_fifo_full +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cmd_fifo_empty +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/read_fifo_re +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/read_fifo_we +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/read_fifo_full +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/read_fifo_empty +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/write_fifo_re +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/write_fifo_we +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/write_fifo_full +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/write_fifo_empty +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cycle_busy +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cmd_en +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/cmd_read_en +add wave -noupdate -format Literal /tb_biu/inst_biu/inst_busmaster/read_cnt +add wave -noupdate -format Logic /tb_biu/inst_biu/inst_busmaster/write TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {2188429 ps} 0} +WaveRestoreCursors {{Cursor 1} {3126068 ps} 0} configure wave -namecolwidth 150 configure wave -valuecolwidth 100 configure wave -justifyvalue left @@ -161,4 +157,4 @@ configure wave -gridperiod 1 configure wave -griddelta 40 configure wave -timeline 0 update -WaveRestoreZoom {9563964 ps} {10022950 ps} +WaveRestoreZoom {0 ps} {10500 ns} diff --git a/lib/CPUs/MIPS/sim/tb_mips_cam.fdo b/lib/CPUs/MIPS/sim/tb_mips_cam.fdo index 93eb44f..2c26d96 100644 --- a/lib/CPUs/MIPS/sim/tb_mips_cam.fdo +++ b/lib/CPUs/MIPS/sim/tb_mips_cam.fdo @@ -12,8 +12,8 @@ vcom -explicit -93 "../../../rams/dpram_1w1r2c_ro_sim.vhd" # FIFOS # MIPS -vcom -explicit -93 "../src/core/TLB/mips_types.vhd" -vcom -explicit -93 "../src/core/TLB/mips_cam.vhd" +vcom -explicit -93 "../src/core/mips_types.vhd" +vcom -explicit -93 "../src/core/mips_cam.vhd" vcom -explicit -93 "../src/tb_mips_cam.vhd" vsim -t 1ps -lib work tb_cam @@ -21,4 +21,4 @@ do {tb_mips_cam.wdo} view wave view structure view signals -run 20us +run 80us diff --git a/lib/CPUs/MIPS/sim/tb_mips_cam.wdo b/lib/CPUs/MIPS/sim/tb_mips_cam.wdo index 5e1a43f..acbae9c 100644 --- a/lib/CPUs/MIPS/sim/tb_mips_cam.wdo +++ b/lib/CPUs/MIPS/sim/tb_mips_cam.wdo @@ -3,12 +3,13 @@ quietly WaveActivateNextPane {} 0 add wave -noupdate -format Logic /tb_cam/clk_o add wave -noupdate -format Logic /tb_cam/rst_o add wave -noupdate -format Logic /tb_cam/cam_rdy +add wave -noupdate -format Literal -radix hexadecimal /tb_cam/cam_addr add wave -noupdate -format Logic /tb_cam/cam_vld add wave -noupdate -format Logic /tb_cam/cam_we +add wave -noupdate -format Literal -radix hexadecimal /tb_cam/cam_wtag add wave -noupdate -format Logic /tb_cam/cam_re -add wave -noupdate -format Literal -radix hexadecimal /tb_cam/cam_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_cam/cam_data -add wave -noupdate -format Literal /tb_cam/cam_hit +add wave -noupdate -format Literal -radix hexadecimal /tb_cam/cam_rtag +add wave -noupdate -format Literal -radix hexadecimal /tb_cam/cam_hit add wave -noupdate -format Logic /tb_cam/cam_hit_vld add wave -noupdate -divider CAM add wave -noupdate -format Literal /tb_cam/inst_cam/state @@ -22,20 +23,19 @@ add wave -noupdate -format Logic /tb_cam/inst_cam/re add wave -noupdate -format Logic /tb_cam/inst_cam/we add wave -noupdate -format Logic /tb_cam/inst_cam/vld add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/addr -add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/din -add wave -noupdate -format Literal /tb_cam/inst_cam/hit +add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/hit add wave -noupdate -format Logic /tb_cam/inst_cam/cam_ram_we add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/cam_ram_addr_wr -add wave -noupdate -format Literal /tb_cam/inst_cam/cam_ram_din +add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/cam_ram_din add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/cam_ram_addr_rd -add wave -noupdate -format Literal -expand /tb_cam/inst_cam/cam_ram_dout -add wave -noupdate -format Literal /tb_cam/inst_cam/cam_ram_result +add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/cam_ram_dout +add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/cam_ram_result add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/clear_addr add wave -noupdate -format Logic /tb_cam/inst_cam/clear_count_en add wave -noupdate -format Logic /tb_cam/inst_cam/clear_count_rdy add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/clear_addr add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/clear_data -add wave -noupdate -format Literal /tb_cam/inst_cam/vld_cam +add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/vld_cam add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/pipe0 add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/pipe1 add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/pipe2 @@ -52,7 +52,7 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/track_ram add wave -noupdate -format Literal -radix hexadecimal /tb_cam/inst_cam/track_ram_dout add wave -noupdate -format Literal -radix hexadecimal -expand /tb_cam/inst_cam/inst_track_ram/ram TreeUpdate [SetDefaultTree] -WaveRestoreCursors {Cursor {19917510 ps} 0} +WaveRestoreCursors {Cursor {34938145 ps} 0} configure wave -namecolwidth 137 configure wave -valuecolwidth 214 configure wave -justifyvalue left @@ -66,4 +66,4 @@ configure wave -gridperiod 100 configure wave -griddelta 40 configure wave -timeline 1 update -WaveRestoreZoom {19867492 ps} {20006975 ps} +WaveRestoreZoom {0 ps} {84 us} diff --git a/lib/CPUs/MIPS/sim/tb_mips_dcache.fdo b/lib/CPUs/MIPS/sim/tb_mips_dcache.fdo index 6a14901..4bddf80 100644 --- a/lib/CPUs/MIPS/sim/tb_mips_dcache.fdo +++ b/lib/CPUs/MIPS/sim/tb_mips_dcache.fdo @@ -2,8 +2,8 @@ ## vlib work -vcom -explicit -93 "../src/core/TLB/mips_util_pkg.vhd" -vcom -explicit -93 "../src/core/TLB/mips_types.vhd" +vcom -explicit -93 "../src/core/mips_util_pkg.vhd" +vcom -explicit -93 "../src/core/mips_types.vhd" vcom -explicit -93 "../../../misc/utils_pkg.vhd" vcom -explicit -93 "../../../JBUS/src/busmaster_types.vhd" @@ -27,18 +27,18 @@ vcom -explicit -93 "../../../FIFO/src/fifo_async_ctrl.vhd" vcom -explicit -93 "../../../FIFO/src/fifo_async.vhd" # MIPS Cache -vcom -explicit -93 "../src/core/TLB/mips_dcache.vhd" +vcom -explicit -93 "../src/core/mips_dcache.vhd" # MIPS TLB -vcom -explicit -93 "../src/core/TLB/mips_tlb_block.vhd" -vcom -explicit -93 "../src/core/TLB/mips_tlb.vhd" +vcom -explicit -93 "../src/core/mips_cam.vhd" +vcom -explicit -93 "../src/core/mips_tlb.vhd" # Busmaster vcom -explicit -93 "../../../JBUS/src/busmaster_sync.vhd" -vcom -explicit -93 "../src/tb_mips_dcache_tlb.vhd" +vcom -explicit -93 "../src/tb_mips_dcache.vhd" -vsim -t 1ps -lib work tb_dcache_tlb -do {tb_mips_dcache_tlb.wdo} +vsim -t 1ps -lib work tb_dcache +do {tb_mips_dcache.wdo} view wave view structure view signals diff --git a/lib/CPUs/MIPS/sim/tb_mips_dcache.wdo b/lib/CPUs/MIPS/sim/tb_mips_dcache.wdo index 0953254..5d3e22b 100644 --- a/lib/CPUs/MIPS/sim/tb_mips_dcache.wdo +++ b/lib/CPUs/MIPS/sim/tb_mips_dcache.wdo @@ -1,250 +1,250 @@ onerror {resume} quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_dcache_tlb/clk -add wave -noupdate -format Logic /tb_dcache_tlb/rst -add wave -noupdate -format Logic /tb_dcache_tlb/int_o -add wave -noupdate -format Logic /tb_dcache_tlb/cyc_o -add wave -noupdate -format Logic /tb_dcache_tlb/stb_o -add wave -noupdate -format Logic /tb_dcache_tlb/we_o -add wave -noupdate -format Literal /tb_dcache_tlb/sel_o -add wave -noupdate -format Logic /tb_dcache_tlb/ack_i -add wave -noupdate -format Logic /tb_dcache_tlb/mrdy_o -add wave -noupdate -format Logic /tb_dcache_tlb/srdy_i -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/addr_o -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/mdat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/mdat_o -add wave -noupdate -format Logic /tb_dcache_tlb/ce -add wave -noupdate -format Literal /tb_dcache_tlb/index_in -add wave -noupdate -format Logic /tb_dcache_tlb/entry_we -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/entry_lo_in -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/entry_hi_in -add wave -noupdate -format Literal /tb_dcache_tlb/index_out -add wave -noupdate -format Logic /tb_dcache_tlb/entry_re -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/entry_lo_out -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/entry_hi_out -add wave -noupdate -format Literal /tb_dcache_tlb/tlb_index_hit -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/tlb_pa -add wave -noupdate -format Literal -expand /tb_dcache_tlb/tlb_flags -add wave -noupdate -format Logic /tb_dcache_tlb/tlb_hit -add wave -noupdate -format Logic /tb_dcache_tlb/cpu_en -add wave -noupdate -format Logic /tb_dcache_tlb/cpu_we -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/cpu_addr -add wave -noupdate -format Literal /tb_dcache_tlb/cpu_be -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/cpu_din -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/cpu_dout -add wave -noupdate -format Logic /tb_dcache_tlb/cpu_rdy -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/dcache_ctrl_in -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/bus_din -add wave -noupdate -format Logic /tb_dcache_tlb/bus_din_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/bus_din_vld -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/bus_dout -add wave -noupdate -format Logic /tb_dcache_tlb/bus_dout_vld -add wave -noupdate -format Logic /tb_dcache_tlb/bus_dout_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/bus_cmd_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/bus_cmd_we -add wave -noupdate -format Logic /tb_dcache_tlb/bus_cmd_cycle_en -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/bus_cmd -add wave -noupdate -format Logic /tb_dcache_tlb/bus_cyc_complete +add wave -noupdate -format Logic /tb_dcache/clk +add wave -noupdate -format Logic /tb_dcache/rst +add wave -noupdate -format Logic /tb_dcache/int_o +add wave -noupdate -format Logic /tb_dcache/cyc_o +add wave -noupdate -format Logic /tb_dcache/stb_o +add wave -noupdate -format Logic /tb_dcache/we_o +add wave -noupdate -format Literal /tb_dcache/sel_o +add wave -noupdate -format Logic /tb_dcache/ack_i +add wave -noupdate -format Logic /tb_dcache/mrdy_o +add wave -noupdate -format Logic /tb_dcache/srdy_i +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/addr_o +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/mdat_i +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/mdat_o +add wave -noupdate -format Logic /tb_dcache/ce +add wave -noupdate -format Literal /tb_dcache/index_in +add wave -noupdate -format Logic /tb_dcache/entry_we +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/entry_lo_in +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/entry_hi_in +add wave -noupdate -format Literal /tb_dcache/index_out +add wave -noupdate -format Logic /tb_dcache/entry_re +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/entry_lo_out +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/entry_hi_out +add wave -noupdate -format Literal /tb_dcache/tlb_index_hit +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/tlb_pa +add wave -noupdate -format Literal -expand /tb_dcache/tlb_flags +add wave -noupdate -format Logic /tb_dcache/tlb_hit +add wave -noupdate -format Logic /tb_dcache/cpu_en +add wave -noupdate -format Logic /tb_dcache/cpu_we +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/cpu_addr +add wave -noupdate -format Literal /tb_dcache/cpu_be +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/cpu_din +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/cpu_dout +add wave -noupdate -format Logic /tb_dcache/cpu_rdy +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/dcache_ctrl_in +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/bus_din +add wave -noupdate -format Logic /tb_dcache/bus_din_rdy +add wave -noupdate -format Logic /tb_dcache/bus_din_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/bus_dout +add wave -noupdate -format Logic /tb_dcache/bus_dout_vld +add wave -noupdate -format Logic /tb_dcache/bus_dout_rdy +add wave -noupdate -format Logic /tb_dcache/bus_cmd_rdy +add wave -noupdate -format Logic /tb_dcache/bus_cmd_we +add wave -noupdate -format Logic /tb_dcache/bus_cmd_cycle_en +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/bus_cmd +add wave -noupdate -format Logic /tb_dcache/bus_cyc_complete add wave -noupdate -divider TLB -add wave -noupdate -format Logic /tb_dcache_tlb/inst_tlb/rst -add wave -noupdate -format Logic /tb_dcache_tlb/inst_tlb/clk -add wave -noupdate -format Logic /tb_dcache_tlb/inst_tlb/ce -add wave -noupdate -format Literal /tb_dcache_tlb/inst_tlb/index_in -add wave -noupdate -format Logic /tb_dcache_tlb/inst_tlb/entry_we -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_tlb/entry_lo_in -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_tlb/entry_hi_in -add wave -noupdate -format Literal /tb_dcache_tlb/inst_tlb/index_out -add wave -noupdate -format Logic /tb_dcache_tlb/inst_tlb/entry_re -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_tlb/entry_lo_out -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_tlb/entry_hi_out -add wave -noupdate -format Literal /tb_dcache_tlb/inst_tlb/tlb_blk_entry_we -add wave -noupdate -format Literal /tb_dcache_tlb/inst_tlb/tlb_blk_hit -add wave -noupdate -format Literal /tb_dcache_tlb/inst_tlb/tlb_blk_flags -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_tlb/tlb_blk_pfn -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_tlb/tlb_blk_entry_lo -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_tlb/tlb_blk_entry_hi -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_tlb/pa -add wave -noupdate -format Logic /tb_dcache_tlb/inst_tlb/hit -add wave -noupdate -format Literal /tb_dcache_tlb/inst_tlb/flags +add wave -noupdate -format Logic /tb_dcache/inst_tlb/rst +add wave -noupdate -format Logic /tb_dcache/inst_tlb/clk +add wave -noupdate -format Logic /tb_dcache/inst_tlb/ce +add wave -noupdate -format Literal /tb_dcache/inst_tlb/index_in +add wave -noupdate -format Logic /tb_dcache/inst_tlb/entry_we +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_tlb/entry_lo_in +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_tlb/entry_hi_in +add wave -noupdate -format Literal /tb_dcache/inst_tlb/index_out +add wave -noupdate -format Logic /tb_dcache/inst_tlb/entry_re +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_tlb/entry_lo_out +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_tlb/entry_hi_out +add wave -noupdate -format Literal /tb_dcache/inst_tlb/tlb_blk_entry_we +add wave -noupdate -format Literal /tb_dcache/inst_tlb/tlb_blk_hit +add wave -noupdate -format Literal /tb_dcache/inst_tlb/tlb_blk_flags +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_tlb/tlb_blk_pfn +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_tlb/tlb_blk_entry_lo +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_tlb/tlb_blk_entry_hi +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_tlb/pa +add wave -noupdate -format Logic /tb_dcache/inst_tlb/hit +add wave -noupdate -format Literal /tb_dcache/inst_tlb/flags add wave -noupdate -divider D-Cache -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/rst -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/clk -add wave -noupdate -format Literal -radix hexadecimal -expand /tb_dcache_tlb/inst_dcache/debug -add wave -noupdate -format Literal /tb_dcache_tlb/inst_dcache/cache_busy_state -add wave -noupdate -format Literal /tb_dcache_tlb/inst_dcache/cache_ctrl_state -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/cpu_din_reg -add wave -noupdate -format Logic /tb_dcache_tlb/cpu_din_vld -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/request_va -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/request_pa -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/cache_req_rd -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/cache_req_wr -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/single_read_en -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/single_read_set -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/single_read_reg_vld -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/din -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/rdy -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/en -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/we -add wave -noupdate -format Literal /tb_dcache_tlb/inst_dcache/be -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/addr -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/tlb_exc -add wave -noupdate -format Literal /tb_dcache_tlb/inst_dcache/tlb_exc_type -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/cache_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/read_rdy -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/dout -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/cache_hit -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/write_hit -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/cache_req_rd -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/cache_req_wr -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/we_reg -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/instant_raw -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/tag_match -add wave -noupdate -format Literal -radix hexadecimal -expand /tb_dcache_tlb/inst_dcache/ctrl_in -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/bus_din -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/bus_din_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/bus_din_vld -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/bus_cmd_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/bus_cmd_we -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/bus_cmd_cycle_en -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/bus_cmd_out -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/bus_cyc_complete -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/cache_hit_inv -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/tag_match_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/cache_index_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/tag_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/tag_reg_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/cache_entry_in -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/cache_entry_out -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/cache_entry_out_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/data_ram_addr -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/data_ram_dout -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/data_reg -add wave -noupdate -format Literal /tb_dcache_tlb/inst_dcache/be_reg -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/ctrl_data_ram_addr -add wave -noupdate -format Literal /tb_dcache_tlb/inst_dcache/ctrl_data_ram_we -add wave -noupdate -format Literal /tb_dcache_tlb/inst_dcache/data_ram_we -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/tag_ram_addr_rd -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/tag_ram_dout -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/tag_ram_dout_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/tag_ram_addr_wr -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/tag_ram_din -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/tag_ram_we -add wave -noupdate -format Literal /tb_dcache_tlb/inst_dcache/fill_count -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/fill_count_en -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/fill_count_rdy -add wave -noupdate -format Literal /tb_dcache_tlb/inst_dcache/flush_count -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/flush_count_rst -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/flush_count_en -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/flush_count_rdy -add wave -noupdate -format Literal /tb_dcache_tlb/inst_dcache/request_count -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/request_count_en -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/request_count_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/was_miss -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/invalidate_all -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/invalidate_ack -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/invalidate_en -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/invalidate_req -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/hit_cache_index -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/req_word_index -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/fill_word_index -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/inst_tag_ram/ram -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/write_fifo_din -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_dcache/write_fifo_dout -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/write_fifo_re -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/write_fifo_we -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/write_fifo_full -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/write_fifo_empty -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/write_data_avail -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/read_write_buffer -add wave -noupdate -format Logic /tb_dcache_tlb/inst_dcache/write_through_en +add wave -noupdate -format Logic /tb_dcache/inst_dcache/rst +add wave -noupdate -format Logic /tb_dcache/inst_dcache/clk +add wave -noupdate -format Literal -radix hexadecimal -expand /tb_dcache/inst_dcache/debug +add wave -noupdate -format Literal /tb_dcache/inst_dcache/cache_busy_state +add wave -noupdate -format Literal /tb_dcache/inst_dcache/cache_ctrl_state +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/cpu_din_reg +add wave -noupdate -format Logic /tb_dcache/cpu_din_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/request_va +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/request_pa +add wave -noupdate -format Logic /tb_dcache/inst_dcache/cache_req_rd +add wave -noupdate -format Logic /tb_dcache/inst_dcache/cache_req_wr +add wave -noupdate -format Logic /tb_dcache/inst_dcache/single_read_en +add wave -noupdate -format Logic /tb_dcache/inst_dcache/single_read_set +add wave -noupdate -format Logic /tb_dcache/inst_dcache/single_read_reg_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/din +add wave -noupdate -format Logic /tb_dcache/inst_dcache/rdy +add wave -noupdate -format Logic /tb_dcache/inst_dcache/en +add wave -noupdate -format Logic /tb_dcache/inst_dcache/we +add wave -noupdate -format Literal /tb_dcache/inst_dcache/be +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/addr +add wave -noupdate -format Logic /tb_dcache/inst_dcache/tlb_exc +add wave -noupdate -format Literal /tb_dcache/inst_dcache/tlb_exc_type +add wave -noupdate -format Logic /tb_dcache/inst_dcache/cache_rdy +add wave -noupdate -format Logic /tb_dcache/inst_dcache/read_rdy +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/dout +add wave -noupdate -format Logic /tb_dcache/inst_dcache/cache_hit +add wave -noupdate -format Logic /tb_dcache/inst_dcache/write_hit +add wave -noupdate -format Logic /tb_dcache/inst_dcache/cache_req_rd +add wave -noupdate -format Logic /tb_dcache/inst_dcache/cache_req_wr +add wave -noupdate -format Logic /tb_dcache/inst_dcache/we_reg +add wave -noupdate -format Logic /tb_dcache/inst_dcache/instant_raw +add wave -noupdate -format Logic /tb_dcache/inst_dcache/tag_match +add wave -noupdate -format Literal -radix hexadecimal -expand /tb_dcache/inst_dcache/ctrl_in +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/bus_din +add wave -noupdate -format Logic /tb_dcache/inst_dcache/bus_din_rdy +add wave -noupdate -format Logic /tb_dcache/inst_dcache/bus_din_vld +add wave -noupdate -format Logic /tb_dcache/inst_dcache/bus_cmd_rdy +add wave -noupdate -format Logic /tb_dcache/inst_dcache/bus_cmd_we +add wave -noupdate -format Logic /tb_dcache/inst_dcache/bus_cmd_cycle_en +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/bus_cmd_out +add wave -noupdate -format Logic /tb_dcache/inst_dcache/bus_cyc_complete +add wave -noupdate -format Logic /tb_dcache/inst_dcache/cache_hit_inv +add wave -noupdate -format Logic /tb_dcache/inst_dcache/tag_match_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/cache_index_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/tag_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/tag_reg_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/cache_entry_in +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/cache_entry_out +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/cache_entry_out_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/data_ram_addr +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/data_ram_dout +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/data_reg +add wave -noupdate -format Literal /tb_dcache/inst_dcache/be_reg +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/ctrl_data_ram_addr +add wave -noupdate -format Literal /tb_dcache/inst_dcache/ctrl_data_ram_we +add wave -noupdate -format Literal /tb_dcache/inst_dcache/data_ram_we +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/tag_ram_addr_rd +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/tag_ram_dout +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/tag_ram_dout_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/tag_ram_addr_wr +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/tag_ram_din +add wave -noupdate -format Logic /tb_dcache/inst_dcache/tag_ram_we +add wave -noupdate -format Literal /tb_dcache/inst_dcache/fill_count +add wave -noupdate -format Logic /tb_dcache/inst_dcache/fill_count_en +add wave -noupdate -format Logic /tb_dcache/inst_dcache/fill_count_rdy +add wave -noupdate -format Literal /tb_dcache/inst_dcache/flush_count +add wave -noupdate -format Logic /tb_dcache/inst_dcache/flush_count_rst +add wave -noupdate -format Logic /tb_dcache/inst_dcache/flush_count_en +add wave -noupdate -format Logic /tb_dcache/inst_dcache/flush_count_rdy +add wave -noupdate -format Literal /tb_dcache/inst_dcache/request_count +add wave -noupdate -format Logic /tb_dcache/inst_dcache/request_count_en +add wave -noupdate -format Logic /tb_dcache/inst_dcache/request_count_rdy +add wave -noupdate -format Logic /tb_dcache/inst_dcache/was_miss +add wave -noupdate -format Logic /tb_dcache/inst_dcache/invalidate_all +add wave -noupdate -format Logic /tb_dcache/inst_dcache/invalidate_ack +add wave -noupdate -format Logic /tb_dcache/inst_dcache/invalidate_en +add wave -noupdate -format Logic /tb_dcache/inst_dcache/invalidate_req +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/hit_cache_index +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/req_word_index +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/fill_word_index +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/inst_tag_ram/ram +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/write_fifo_din +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_dcache/write_fifo_dout +add wave -noupdate -format Logic /tb_dcache/inst_dcache/write_fifo_re +add wave -noupdate -format Logic /tb_dcache/inst_dcache/write_fifo_we +add wave -noupdate -format Logic /tb_dcache/inst_dcache/write_fifo_full +add wave -noupdate -format Logic /tb_dcache/inst_dcache/write_fifo_empty +add wave -noupdate -format Logic /tb_dcache/inst_dcache/write_data_avail +add wave -noupdate -format Logic /tb_dcache/inst_dcache/read_write_buffer +add wave -noupdate -format Logic /tb_dcache/inst_dcache/write_through_en add wave -noupdate -divider Bus-Master -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/clk -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/rst -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cmd_cycle_finished -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cmd_cycle_en -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cmd_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cmd_we -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_busmaster_sync/cmd_in -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_busmaster_sync/din -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/din_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/din_we -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_busmaster_sync/dout -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/dout_vld -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/dout_re -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/ack_i -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/srdy_i -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_busmaster_sync/mdat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_busmaster_sync/mdat_o -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_busmaster_sync/addr_o -add wave -noupdate -format Literal /tb_dcache_tlb/inst_busmaster_sync/sel_o -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/we_o -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cyc_o -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/stb_o -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/mrdy_o -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_busmaster_sync/cmd_fifo_din -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/inst_busmaster_sync/cmd_fifo_dout -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cmd_fifo_re -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cmd_fifo_we -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cmd_fifo_full -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cmd_fifo_empty -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/read_fifo_re -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/read_fifo_we -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/read_fifo_full -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/read_fifo_empty -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/write_fifo_re -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/write_fifo_we -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/write_fifo_full -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/write_fifo_empty -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cycle_busy -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cmd_en -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/cmd_read_en -add wave -noupdate -format Literal /tb_dcache_tlb/inst_busmaster_sync/read_cnt -add wave -noupdate -format Logic /tb_dcache_tlb/inst_busmaster_sync/write -add wave -noupdate -format Logic /tb_dcache_tlb/clk -add wave -noupdate -format Logic /tb_dcache_tlb/rst -add wave -noupdate -format Logic /tb_dcache_tlb/int_o -add wave -noupdate -format Logic /tb_dcache_tlb/cyc_o -add wave -noupdate -format Logic /tb_dcache_tlb/stb_o -add wave -noupdate -format Logic /tb_dcache_tlb/we_o -add wave -noupdate -format Literal /tb_dcache_tlb/sel_o -add wave -noupdate -format Logic /tb_dcache_tlb/ack_i -add wave -noupdate -format Logic /tb_dcache_tlb/mrdy_o -add wave -noupdate -format Logic /tb_dcache_tlb/srdy_i -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/addr_o -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/mdat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/mdat_o -add wave -noupdate -format Logic /tb_dcache_tlb/ce -add wave -noupdate -format Literal /tb_dcache_tlb/index_in -add wave -noupdate -format Logic /tb_dcache_tlb/entry_we -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/entry_lo_in -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/entry_hi_in -add wave -noupdate -format Literal /tb_dcache_tlb/index_out -add wave -noupdate -format Logic /tb_dcache_tlb/entry_re -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/entry_lo_out -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/entry_hi_out -add wave -noupdate -format Literal /tb_dcache_tlb/tlb_index_hit -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/tlb_pa -add wave -noupdate -format Literal -expand /tb_dcache_tlb/tlb_flags -add wave -noupdate -format Logic /tb_dcache_tlb/tlb_hit -add wave -noupdate -format Logic /tb_dcache_tlb/cpu_en -add wave -noupdate -format Logic /tb_dcache_tlb/cpu_we -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/cpu_addr -add wave -noupdate -format Literal /tb_dcache_tlb/cpu_be -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/cpu_din -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/cpu_dout -add wave -noupdate -format Logic /tb_dcache_tlb/cpu_rdy -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/dcache_ctrl_in -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/bus_din -add wave -noupdate -format Logic /tb_dcache_tlb/bus_din_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/bus_din_vld -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/bus_dout -add wave -noupdate -format Logic /tb_dcache_tlb/bus_dout_vld -add wave -noupdate -format Logic /tb_dcache_tlb/bus_dout_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/bus_cmd_rdy -add wave -noupdate -format Logic /tb_dcache_tlb/bus_cmd_we -add wave -noupdate -format Logic /tb_dcache_tlb/bus_cmd_cycle_en -add wave -noupdate -format Literal -radix hexadecimal /tb_dcache_tlb/bus_cmd -add wave -noupdate -format Logic /tb_dcache_tlb/bus_cyc_complete +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/clk +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/rst +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cmd_cycle_finished +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cmd_cycle_en +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cmd_rdy +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cmd_we +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_busmaster_sync/cmd_in +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_busmaster_sync/din +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/din_rdy +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/din_we +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_busmaster_sync/dout +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/dout_vld +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/dout_re +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/ack_i +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/srdy_i +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_busmaster_sync/mdat_i +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_busmaster_sync/mdat_o +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_busmaster_sync/addr_o +add wave -noupdate -format Literal /tb_dcache/inst_busmaster_sync/sel_o +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/we_o +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cyc_o +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/stb_o +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/mrdy_o +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_busmaster_sync/cmd_fifo_din +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/inst_busmaster_sync/cmd_fifo_dout +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cmd_fifo_re +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cmd_fifo_we +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cmd_fifo_full +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cmd_fifo_empty +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/read_fifo_re +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/read_fifo_we +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/read_fifo_full +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/read_fifo_empty +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/write_fifo_re +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/write_fifo_we +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/write_fifo_full +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/write_fifo_empty +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cycle_busy +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cmd_en +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/cmd_read_en +add wave -noupdate -format Literal /tb_dcache/inst_busmaster_sync/read_cnt +add wave -noupdate -format Logic /tb_dcache/inst_busmaster_sync/write +add wave -noupdate -format Logic /tb_dcache/clk +add wave -noupdate -format Logic /tb_dcache/rst +add wave -noupdate -format Logic /tb_dcache/int_o +add wave -noupdate -format Logic /tb_dcache/cyc_o +add wave -noupdate -format Logic /tb_dcache/stb_o +add wave -noupdate -format Logic /tb_dcache/we_o +add wave -noupdate -format Literal /tb_dcache/sel_o +add wave -noupdate -format Logic /tb_dcache/ack_i +add wave -noupdate -format Logic /tb_dcache/mrdy_o +add wave -noupdate -format Logic /tb_dcache/srdy_i +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/addr_o +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/mdat_i +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/mdat_o +add wave -noupdate -format Logic /tb_dcache/ce +add wave -noupdate -format Literal /tb_dcache/index_in +add wave -noupdate -format Logic /tb_dcache/entry_we +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/entry_lo_in +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/entry_hi_in +add wave -noupdate -format Literal /tb_dcache/index_out +add wave -noupdate -format Logic /tb_dcache/entry_re +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/entry_lo_out +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/entry_hi_out +add wave -noupdate -format Literal /tb_dcache/tlb_index_hit +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/tlb_pa +add wave -noupdate -format Literal -expand /tb_dcache/tlb_flags +add wave -noupdate -format Logic /tb_dcache/tlb_hit +add wave -noupdate -format Logic /tb_dcache/cpu_en +add wave -noupdate -format Logic /tb_dcache/cpu_we +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/cpu_addr +add wave -noupdate -format Literal /tb_dcache/cpu_be +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/cpu_din +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/cpu_dout +add wave -noupdate -format Logic /tb_dcache/cpu_rdy +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/dcache_ctrl_in +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/bus_din +add wave -noupdate -format Logic /tb_dcache/bus_din_rdy +add wave -noupdate -format Logic /tb_dcache/bus_din_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/bus_dout +add wave -noupdate -format Logic /tb_dcache/bus_dout_vld +add wave -noupdate -format Logic /tb_dcache/bus_dout_rdy +add wave -noupdate -format Logic /tb_dcache/bus_cmd_rdy +add wave -noupdate -format Logic /tb_dcache/bus_cmd_we +add wave -noupdate -format Logic /tb_dcache/bus_cmd_cycle_en +add wave -noupdate -format Literal -radix hexadecimal /tb_dcache/bus_cmd +add wave -noupdate -format Logic /tb_dcache/bus_cyc_complete TreeUpdate [SetDefaultTree] WaveRestoreCursors {{Cursor 1} {743514 ps} 0} configure wave -namecolwidth 150 diff --git a/lib/CPUs/MIPS/sim/tb_mips_icache.fdo b/lib/CPUs/MIPS/sim/tb_mips_icache.fdo index 0c55ed6..ff9c69e 100644 --- a/lib/CPUs/MIPS/sim/tb_mips_icache.fdo +++ b/lib/CPUs/MIPS/sim/tb_mips_icache.fdo @@ -2,8 +2,8 @@ ## vlib work -vcom -explicit -93 "../src/core/TLB/mips_util_pkg.vhd" -vcom -explicit -93 "../src/core/TLB/mips_types.vhd" +vcom -explicit -93 "../src/core/mips_util_pkg.vhd" +vcom -explicit -93 "../src/core/mips_types.vhd" vcom -explicit -93 "../../../misc/utils_pkg.vhd" vcom -explicit -93 "../../../JBUS/src/busmaster_types.vhd" @@ -27,18 +27,18 @@ vcom -explicit -93 "../../../FIFO/src/fifo_async_ctrl.vhd" vcom -explicit -93 "../../../FIFO/src/fifo_async.vhd" # MIPS Cache -vcom -explicit -93 "../src/core/TLB/mips_icache.vhd" +vcom -explicit -93 "../src/core/mips_icache.vhd" # MIPS TLB -vcom -explicit -93 "../src/core/TLB/mips_tlb_block.vhd" -vcom -explicit -93 "../src/core/TLB/mips_tlb.vhd" +vcom -explicit -93 "../src/core/mips_cam.vhd" +vcom -explicit -93 "../src/core/mips_tlb.vhd" # Busmaster vcom -explicit -93 "../../../JBUS/src/busmaster_sync.vhd" -vcom -explicit -93 "../src/tb_mips_icache_tlb.vhd" +vcom -explicit -93 "../src/tb_mips_icache.vhd" -vsim -t 1ps -lib work tb_icache_tlb -do {tb_mips_icache_tlb.wdo} +vsim -t 1ps -lib work tb_icache +do {tb_mips_icache.wdo} view wave view structure view signals diff --git a/lib/CPUs/MIPS/sim/tb_mips_icache.wdo b/lib/CPUs/MIPS/sim/tb_mips_icache.wdo index 5a607bf..6fa2163 100644 --- a/lib/CPUs/MIPS/sim/tb_mips_icache.wdo +++ b/lib/CPUs/MIPS/sim/tb_mips_icache.wdo @@ -1,149 +1,149 @@ onerror {resume} quietly WaveActivateNextPane {} 0 -add wave -noupdate -format Logic /tb_icache_tlb/clk -add wave -noupdate -format Logic /tb_icache_tlb/rst -add wave -noupdate -format Logic /tb_icache_tlb/int_o -add wave -noupdate -format Logic /tb_icache_tlb/cyc_o -add wave -noupdate -format Logic /tb_icache_tlb/stb_o -add wave -noupdate -format Logic /tb_icache_tlb/we_o -add wave -noupdate -format Literal /tb_icache_tlb/sel_o -add wave -noupdate -format Logic /tb_icache_tlb/ack_i -add wave -noupdate -format Logic /tb_icache_tlb/mrdy_o -add wave -noupdate -format Logic /tb_icache_tlb/srdy_i -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/addr_o -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/mdat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/mdat_o +add wave -noupdate -format Logic /tb_icache/clk +add wave -noupdate -format Logic /tb_icache/rst +add wave -noupdate -format Logic /tb_icache/int_o +add wave -noupdate -format Logic /tb_icache/cyc_o +add wave -noupdate -format Logic /tb_icache/stb_o +add wave -noupdate -format Logic /tb_icache/we_o +add wave -noupdate -format Literal /tb_icache/sel_o +add wave -noupdate -format Logic /tb_icache/ack_i +add wave -noupdate -format Logic /tb_icache/mrdy_o +add wave -noupdate -format Logic /tb_icache/srdy_i +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/addr_o +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/mdat_i +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/mdat_o add wave -noupdate -divider TLB -add wave -noupdate -format Logic /tb_icache_tlb/inst_tlb/rst -add wave -noupdate -format Logic /tb_icache_tlb/inst_tlb/clk -add wave -noupdate -format Logic /tb_icache_tlb/inst_tlb/ce -add wave -noupdate -format Literal /tb_icache_tlb/inst_tlb/index_in -add wave -noupdate -format Logic /tb_icache_tlb/inst_tlb/entry_we -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_tlb/entry_lo_in -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_tlb/entry_hi_in -add wave -noupdate -format Literal /tb_icache_tlb/inst_tlb/index_out -add wave -noupdate -format Logic /tb_icache_tlb/inst_tlb/entry_re -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_tlb/entry_lo_out -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_tlb/entry_hi_out -add wave -noupdate -format Literal /tb_icache_tlb/inst_tlb/tlb_blk_entry_we -add wave -noupdate -format Literal /tb_icache_tlb/inst_tlb/tlb_blk_hit -add wave -noupdate -format Literal /tb_icache_tlb/inst_tlb/tlb_blk_flags -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_tlb/tlb_blk_pfn -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_tlb/tlb_blk_entry_lo -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_tlb/tlb_blk_entry_hi -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_tlb/pa -add wave -noupdate -format Logic /tb_icache_tlb/inst_tlb/hit -add wave -noupdate -format Literal /tb_icache_tlb/inst_tlb/flags +add wave -noupdate -format Logic /tb_icache/inst_tlb/rst +add wave -noupdate -format Logic /tb_icache/inst_tlb/clk +add wave -noupdate -format Logic /tb_icache/inst_tlb/ce +add wave -noupdate -format Literal /tb_icache/inst_tlb/index_in +add wave -noupdate -format Logic /tb_icache/inst_tlb/entry_we +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_tlb/entry_lo_in +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_tlb/entry_hi_in +add wave -noupdate -format Literal /tb_icache/inst_tlb/index_out +add wave -noupdate -format Logic /tb_icache/inst_tlb/entry_re +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_tlb/entry_lo_out +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_tlb/entry_hi_out +add wave -noupdate -format Literal /tb_icache/inst_tlb/tlb_blk_entry_we +add wave -noupdate -format Literal /tb_icache/inst_tlb/tlb_blk_hit +add wave -noupdate -format Literal /tb_icache/inst_tlb/tlb_blk_flags +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_tlb/tlb_blk_pfn +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_tlb/tlb_blk_entry_lo +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_tlb/tlb_blk_entry_hi +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_tlb/pa +add wave -noupdate -format Logic /tb_icache/inst_tlb/hit +add wave -noupdate -format Literal /tb_icache/inst_tlb/flags add wave -noupdate -divider I-Cache -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/rst -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/clk -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/cpu_din_reg -add wave -noupdate -format Logic /tb_icache_tlb/cpu_din_vld -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/request_va -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/request_pa -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/cache_req_rd -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/cache_hit -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/en -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/read_rdy -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/rdy -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/addr -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/dout -add wave -noupdate -format Literal /tb_icache_tlb/inst_icache/cache_busy_state -add wave -noupdate -format Literal /tb_icache_tlb/inst_icache/cache_ctrl_state -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/single_read_reg_vld -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/single_read_reg -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/ctrl_in -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/tag_ram_we -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/cache_entry_in -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/cache_entry_out -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/bus_din -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/bus_din_rdy -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/bus_din_vld -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/bus_cmd_rdy -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/bus_cmd_we -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/bus_cmd_cycle_en -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/bus_cmd_out -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/bus_cyc_complete -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/cache_rdy -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/tag_match -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/tag_match_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/cache_index_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/tag_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/tag_reg_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/cache_entry_out_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/data_ram_addr_rd -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/data_ram_data_rd -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/data_ram_addr_wr -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/data_ram_data_wr -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/data_ram_we -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/tag_ram_addr_rd -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/tag_ram_data_rd -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/tag_ram_data_rd_inv -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/tag_ram_addr_wr -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/tag_ram_data_wr -add wave -noupdate -format Literal /tb_icache_tlb/inst_icache/fill_count -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/fill_count_en -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/fill_count_rdy -add wave -noupdate -format Literal /tb_icache_tlb/inst_icache/flush_count -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/flush_count_rst -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/flush_count_en -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/flush_count_rdy -add wave -noupdate -format Literal /tb_icache_tlb/inst_icache/request_count -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/request_count_en -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/request_count_rdy -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/ram_read_en -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/was_miss -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/invalidate_all -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/invalidate_ack -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/invalidate_en -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/invalidate_req -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/req_word_index -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_icache/fill_word_index -add wave -noupdate -format Logic /tb_icache_tlb/inst_icache/tlb_exc -add wave -noupdate -format Literal /tb_icache_tlb/inst_icache/tlb_exc_type +add wave -noupdate -format Logic /tb_icache/inst_icache/rst +add wave -noupdate -format Logic /tb_icache/inst_icache/clk +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/cpu_din_reg +add wave -noupdate -format Logic /tb_icache/cpu_din_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/request_va +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/request_pa +add wave -noupdate -format Logic /tb_icache/inst_icache/cache_req_rd +add wave -noupdate -format Logic /tb_icache/inst_icache/cache_hit +add wave -noupdate -format Logic /tb_icache/inst_icache/en +add wave -noupdate -format Logic /tb_icache/inst_icache/read_rdy +add wave -noupdate -format Logic /tb_icache/inst_icache/rdy +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/addr +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/dout +add wave -noupdate -format Literal /tb_icache/inst_icache/cache_busy_state +add wave -noupdate -format Literal /tb_icache/inst_icache/cache_ctrl_state +add wave -noupdate -format Logic /tb_icache/inst_icache/single_read_reg_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/single_read_reg +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/ctrl_in +add wave -noupdate -format Logic /tb_icache/inst_icache/tag_ram_we +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/cache_entry_in +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/cache_entry_out +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/bus_din +add wave -noupdate -format Logic /tb_icache/inst_icache/bus_din_rdy +add wave -noupdate -format Logic /tb_icache/inst_icache/bus_din_vld +add wave -noupdate -format Logic /tb_icache/inst_icache/bus_cmd_rdy +add wave -noupdate -format Logic /tb_icache/inst_icache/bus_cmd_we +add wave -noupdate -format Logic /tb_icache/inst_icache/bus_cmd_cycle_en +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/bus_cmd_out +add wave -noupdate -format Logic /tb_icache/inst_icache/bus_cyc_complete +add wave -noupdate -format Logic /tb_icache/inst_icache/cache_rdy +add wave -noupdate -format Logic /tb_icache/inst_icache/tag_match +add wave -noupdate -format Logic /tb_icache/inst_icache/tag_match_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/cache_index_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/tag_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/tag_reg_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/cache_entry_out_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/data_ram_addr_rd +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/data_ram_data_rd +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/data_ram_addr_wr +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/data_ram_data_wr +add wave -noupdate -format Logic /tb_icache/inst_icache/data_ram_we +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/tag_ram_addr_rd +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/tag_ram_data_rd +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/tag_ram_data_rd_inv +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/tag_ram_addr_wr +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/tag_ram_data_wr +add wave -noupdate -format Literal /tb_icache/inst_icache/fill_count +add wave -noupdate -format Logic /tb_icache/inst_icache/fill_count_en +add wave -noupdate -format Logic /tb_icache/inst_icache/fill_count_rdy +add wave -noupdate -format Literal /tb_icache/inst_icache/flush_count +add wave -noupdate -format Logic /tb_icache/inst_icache/flush_count_rst +add wave -noupdate -format Logic /tb_icache/inst_icache/flush_count_en +add wave -noupdate -format Logic /tb_icache/inst_icache/flush_count_rdy +add wave -noupdate -format Literal /tb_icache/inst_icache/request_count +add wave -noupdate -format Logic /tb_icache/inst_icache/request_count_en +add wave -noupdate -format Logic /tb_icache/inst_icache/request_count_rdy +add wave -noupdate -format Logic /tb_icache/inst_icache/ram_read_en +add wave -noupdate -format Logic /tb_icache/inst_icache/was_miss +add wave -noupdate -format Logic /tb_icache/inst_icache/invalidate_all +add wave -noupdate -format Logic /tb_icache/inst_icache/invalidate_ack +add wave -noupdate -format Logic /tb_icache/inst_icache/invalidate_en +add wave -noupdate -format Logic /tb_icache/inst_icache/invalidate_req +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/req_word_index +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_icache/fill_word_index +add wave -noupdate -format Logic /tb_icache/inst_icache/tlb_exc +add wave -noupdate -format Literal /tb_icache/inst_icache/tlb_exc_type add wave -noupdate -divider Busmaster -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/clk -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/rst -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cmd_cycle_finished -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cmd_cycle_en -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cmd_rdy -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cmd_we -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_busmaster_sync/cmd_in -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_busmaster_sync/din -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/din_rdy -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/din_we -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_busmaster_sync/dout -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/dout_vld -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/dout_re -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/ack_i -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/srdy_i -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_busmaster_sync/mdat_i -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_busmaster_sync/mdat_o -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_busmaster_sync/addr_o -add wave -noupdate -format Literal /tb_icache_tlb/inst_busmaster_sync/sel_o -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/we_o -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cyc_o -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/stb_o -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/mrdy_o -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_busmaster_sync/cmd_fifo_din -add wave -noupdate -format Literal -radix hexadecimal /tb_icache_tlb/inst_busmaster_sync/cmd_fifo_dout -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cmd_fifo_re -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cmd_fifo_we -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cmd_fifo_full -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cmd_fifo_empty -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/read_fifo_re -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/read_fifo_we -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/read_fifo_full -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/read_fifo_empty -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/write_fifo_re -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/write_fifo_we -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/write_fifo_full -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/write_fifo_empty -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cycle_busy -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cmd_en -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/cmd_read_en -add wave -noupdate -format Literal /tb_icache_tlb/inst_busmaster_sync/read_cnt -add wave -noupdate -format Logic /tb_icache_tlb/inst_busmaster_sync/write +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/clk +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/rst +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cmd_cycle_finished +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cmd_cycle_en +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cmd_rdy +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cmd_we +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_busmaster_sync/cmd_in +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_busmaster_sync/din +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/din_rdy +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/din_we +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_busmaster_sync/dout +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/dout_vld +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/dout_re +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/ack_i +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/srdy_i +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_busmaster_sync/mdat_i +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_busmaster_sync/mdat_o +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_busmaster_sync/addr_o +add wave -noupdate -format Literal /tb_icache/inst_busmaster_sync/sel_o +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/we_o +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cyc_o +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/stb_o +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/mrdy_o +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_busmaster_sync/cmd_fifo_din +add wave -noupdate -format Literal -radix hexadecimal /tb_icache/inst_busmaster_sync/cmd_fifo_dout +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cmd_fifo_re +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cmd_fifo_we +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cmd_fifo_full +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cmd_fifo_empty +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/read_fifo_re +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/read_fifo_we +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/read_fifo_full +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/read_fifo_empty +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/write_fifo_re +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/write_fifo_we +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/write_fifo_full +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/write_fifo_empty +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cycle_busy +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cmd_en +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/cmd_read_en +add wave -noupdate -format Literal /tb_icache/inst_busmaster_sync/read_cnt +add wave -noupdate -format Logic /tb_icache/inst_busmaster_sync/write TreeUpdate [SetDefaultTree] WaveRestoreCursors {{Cursor 1} {1549212 ps} 0} configure wave -namecolwidth 150