Moved

git-svn-id: http://moon:8086/svn/vhdl/trunk@1138 cc03376c-175c-47c8-b038-4cd826a8556b

lib/CPUs/MIPS/syn/ise101/project/mips_top.lso

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+work

lib/CPUs/MIPS/syn/ise101/project/mips_top.prj

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+vhdl work "../../../../FIFO/src/fifo_ctrl_pkg.vhd"
+vhdl work "../../../../FIFO/src/gray_counter.vhd"
+vhdl work "../../../../rams/dpram_2w2r2c_ra_xil.vhd"
+vhdl work "../../../../rams/dpram_1w1r2c_ra_xil.vhd"
+vhdl work "../../../../FIFO/src/fifo_sync_ctrl.vhd"
+vhdl work "../../../../FIFO/src/fifo_async_ctrl.vhd"
+vhdl work "../../src/core/mips_types.vhd"
+vhdl work "../../../../FIFO/src/fifo_sync.vhd"
+vhdl work "../../../../FIFO/src/fifo_async.vhd"
+vhdl work "../../src/core/mips_shifter.vhd"
+vhdl work "../../src/core/mips_reg.vhd"
+vhdl work "../../src/core/mips_muldiv.vhd"
+vhdl work "../../src/core/mips_instr.vhd"
+vhdl work "../../src/core/mips_icache.vhd"
+vhdl work "../../src/core/mips_dcache.vhd"
+vhdl work "../../src/core/mips_bcu.vhd"
+vhdl work "../../src/core/mips_alu.vhd"
+vhdl work "../../src/core/mips_pipeline.vhd"
+vhdl work "../../src/core/mips_cop.vhd"
+vhdl work "../../src/core/mips_biu.vhd"
+vhdl work "../../src/core/mips_top.vhd"

lib/CPUs/MIPS/syn/ise101/project/mips_top.xcf

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+# Bus clock nets
+NET "CLK_I" TNM_NET = "sys_clk";
+TIMESPEC "TS_clk" = PERIOD "sys_clk" 9.9 ns HIGH 50 %;
+
+NET "cpu_clk" TNM_NET = "cpu_clk";
+TIMESPEC "TS_cpu_clk" = PERIOD "cpu_clk" 9.9 ns HIGH 50 %;
+
+BEGIN MODEL biu
+	INST inst_bin_fifo ram_style = distributed;
+	INST inst_bout_fifo ram_style = distributed;
+	INST inst_write_fifo ram_style = distributed;
+END;
+

lib/CPUs/MIPS/syn/ise101/project/mips_top.xst

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+set -xsthdpdir "./xst"
+set -tmpdir "./xst/tmp"
+run
+-ifn mips_top.prj
+-ifmt mixed
+-ofn mips_top
+-ofmt NGC
+-p xc4vsx35-10-ff668
+-top mips_top
+-opt_mode Speed
+-opt_level 1
+-power NO
+-uc "./constraints/mips_top.xcf"
+-iuc NO
+-lso mips_top.lso
+-keep_hierarchy NO
+-netlist_hierarchy as_optimized
+-rtlview Yes
+-glob_opt AllClockNets
+-read_cores YES
+-write_timing_constraints NO
+-cross_clock_analysis YES
+-hierarchy_separator /
+-bus_delimiter <>
+-case maintain
+-slice_utilization_ratio 100
+-bram_utilization_ratio 100
+-dsp_utilization_ratio 100
+-verilog2001 YES
+-generics { icache_size=8192 dcache_size=4096 }
+-fsm_extract YES -fsm_encoding Speed1
+-safe_implementation No
+-fsm_style lut
+-ram_extract Yes
+-ram_style Auto
+-rom_extract Yes
+-mux_style Auto
+-decoder_extract YES
+-priority_extract YES
+-shreg_extract YES
+-shift_extract YES
+-xor_collapse YES
+-rom_style Auto
+-auto_bram_packing NO
+-mux_extract YES
+-resource_sharing YES
+-async_to_sync NO
+-use_dsp48 auto
+-iobuf NO
+-max_fanout 500
+-bufg 32
+-bufr 24
+-register_duplication YES
+-register_balancing No
+-slice_packing YES
+-optimize_primitives NO
+-use_clock_enable Auto
+-use_sync_set Auto
+-use_sync_reset Auto
+-iob auto
+-equivalent_register_removal YES
+-slice_utilization_ratio_maxmargin 5