diff --git a/lib/CPUs/MIPS/sim/tb_mips_top.fdo b/lib/CPUs/MIPS/sim/tb_mips_top.fdo
index 1be1be5..38e4c46 100644
--- a/lib/CPUs/MIPS/sim/tb_mips_top.fdo
+++ b/lib/CPUs/MIPS/sim/tb_mips_top.fdo
@@ -31,8 +31,8 @@ vcom -explicit  -93 "../../../misc/async_port_wb.vhd"
 vcom -explicit  -93 "../src/async_defs.vhd"
 
 # ROM
-#vcom -explicit  -93 "Z:/work/repos/mips/src/bootloader/test.ROM.vhd"
-#vcom -explicit  -93 "Z:/work/repos/mips/src/bootloader/bootloader_flash.ROM.vhd"
+#vcom -explicit  -93 "Z:/work/repos/mips/src/bootloader/build/ml402/eb/bootloader.elf.ROM.vhd"
+#vcom -explicit  -93 "Z:/work/repos/mips/src/bootloader/build/denano/eb/bootloader.elf.ROM.vhd"
 vcom -explicit  -93 "../src/bootloader_flash.ROM.vhd"
 vcom -explicit  -93 "../../../misc/rom_wb.vhd"
 
diff --git a/lib/uart/uart_sim.vhd b/lib/uart/uart_sim.vhd
index a90fa2f..0c0a20f 100644
--- a/lib/uart/uart_sim.vhd
+++ b/lib/uart/uart_sim.vhd
@@ -9,6 +9,10 @@ use std.textio.all; --  Imports the standard textio package.
 
 ------------------------------------------------------------------------------------
 ENTITY uart IS
+	Generic 
+	(
+		fifo_depth_bits	: integer := 4
+	);
 	Port
 	(
 		clk			: in  STD_LOGIC;