From 9a3aa287fdf535505cb1449bcd250cd63e5f225f Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sun, 29 Nov 2009 16:47:56 +0000 Subject: [PATCH] - register set extended for future extensions Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@691 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/VGA_ctrl/src/tb_vga_frontend64.vhd | 44 +++++-- lib/VGA_ctrl/src/vga_frontend64.vhd | 171 ++++++++++++++----------- 2 files changed, 129 insertions(+), 86 deletions(-) diff --git a/lib/VGA_ctrl/src/tb_vga_frontend64.vhd b/lib/VGA_ctrl/src/tb_vga_frontend64.vhd index 5ce0c34..ac7ec08 100644 --- a/lib/VGA_ctrl/src/tb_vga_frontend64.vhd +++ b/lib/VGA_ctrl/src/tb_vga_frontend64.vhd @@ -351,7 +351,7 @@ STIMULUS: process wait for 60000*CLK_PERIOD; - for i in 0 to 3 loop + for i in 0 to 99 loop -- BLIT test -- Read status @@ -363,7 +363,7 @@ STIMULUS: process wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '0'; wait until rising_edge(CLK_O) and ACK_I = '1'; - -- set src addr + -- set src addr first CYC_O <= '1'; wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '1'; @@ -372,22 +372,40 @@ STIMULUS: process ADDR_O <= X"0000_0020"; wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '0'; + -- set src addr last + CYC_O <= '1'; + wait until rising_edge(CLK_O) and SRDY_I = '1'; + STB_O <= '1'; + WE_O <= '1'; + SDAT_O <= X"4100_0000" + to_unsigned(4*(80*4-1), 32); + ADDR_O <= X"0000_0024"; + wait until rising_edge(CLK_O) and SRDY_I = '1'; + STB_O <= '0'; -- set src dim-x CYC_O <= '1'; wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '1'; WE_O <= '1'; - SDAT_O <= X"0000_0140"; - ADDR_O <= X"0000_002C"; + SDAT_O <= to_unsigned(4*80, 32); + ADDR_O <= X"0000_0028"; wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '0'; - -- set dst addr + -- set dst addr first CYC_O <= '1'; wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '1'; WE_O <= '1'; SDAT_O <= X"4200_0000"; - ADDR_O <= X"0000_0028"; + ADDR_O <= X"0000_0050"; + wait until rising_edge(CLK_O) and SRDY_I = '1'; + STB_O <= '0'; + -- set dst addr last + CYC_O <= '1'; + wait until rising_edge(CLK_O) and SRDY_I = '1'; + STB_O <= '1'; + WE_O <= '1'; + SDAT_O <= X"4200_0000" + to_unsigned(4*(80*4-1), 32); + ADDR_O <= X"0000_0054"; wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '0'; -- set dst dim-x @@ -395,8 +413,8 @@ STIMULUS: process wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '1'; WE_O <= '1'; - SDAT_O <= X"0000_0140"; - ADDR_O <= X"0000_0034"; + SDAT_O <= to_unsigned(4*80, 32); + ADDR_O <= X"0000_0058"; wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '0'; -- set nx @@ -404,8 +422,8 @@ STIMULUS: process wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '1'; WE_O <= '1'; - SDAT_O <= X"0000_12BF"; - ADDR_O <= X"0000_0038"; + SDAT_O <= to_unsigned(80-1, 32); + ADDR_O <= X"0000_0060"; wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '0'; -- set ny @@ -413,8 +431,8 @@ STIMULUS: process wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '1'; WE_O <= '1'; - SDAT_O <= X"0000_0000"; - ADDR_O <= X"0000_003C"; + SDAT_O <= X"0000_0003"; + ADDR_O <= X"0000_0064"; wait until rising_edge(CLK_O) and SRDY_I = '1'; STB_O <= '0'; -- set blit request @@ -429,7 +447,7 @@ STIMULUS: process CYC_O <= '0'; WE_O <= '0'; - wait for 600000*CLK_PERIOD; + wait for 100000*CLK_PERIOD; end loop; diff --git a/lib/VGA_ctrl/src/vga_frontend64.vhd b/lib/VGA_ctrl/src/vga_frontend64.vhd index 8215f67..93973f0 100644 --- a/lib/VGA_ctrl/src/vga_frontend64.vhd +++ b/lib/VGA_ctrl/src/vga_frontend64.vhd @@ -456,7 +456,7 @@ vga_master: when rdy => request_cnt_rst <= '1'; if fifo_almost_empty = '1' and vga_scan_dma_en2 = '1' then - sn <= scan_bus_request; + sn <= scan_bus_request; elsif blit_request = '1' then if blitfifo_empty = '1' then sn <= blit_src_bus_request; @@ -700,10 +700,11 @@ registers_read: if (STB_I and CYC_I) = '1' then ACK_O <= not WE_I; SDAT_O <= (others => '0'); - case ADDR_I(5 downto 2) is + case ADDR_I(6 downto 2) is - -- sys_vga_ctrl 0 - when "0000" => + -- sys_vga_ctrl + -- 0x00 + when "00000" => SDAT_O(0) <= cg_rdy; SDAT_O(1) <= vga_scan_dma_en; SDAT_O(2) <= bufchg_irq_en; @@ -714,64 +715,76 @@ registers_read: SDAT_O(23 downto 20) <= blit_comb_sel; SDAT_O(19 downto 16) <= blit_func_sel; - -- sys_vga_ascii 4 - when "0001" => + -- sys_vga_ascii + -- 0x04 + when "00001" => SDAT_O(7 downto 0) <= cg_dout; - -- sys_vga_posx 8 - when "0010" => + -- sys_vga_posx + -- 0x08 + when "00010" => SDAT_O(7 downto 0) <= to_unsigned(cg_csr_pos_x, 8); - -- sys_vga_posy 12 - when "0011" => + -- sys_vga_posy + -- 0x0C + when "00011" => SDAT_O(7 downto 0) <= to_unsigned(cg_csr_pos_y, 8); - -- sys_vga_cgcol 16 - when "0100" => + -- sys_vga_cgcol + -- 0x10 + when "00100" => SDAT_O <= to_unsigned(cg_color); - -- sys_vga_res 20 - when "0101" => + -- sys_vga_res + -- 0x14 + when "00101" => SDAT_O <= to_unsigned(tsvga.nfps, 8) & to_unsigned(tsvga.ts_v.ncyc_scan, 12) & to_unsigned(tsvga.ts_h.ncyc_scan, 12); - -- sys_vga_fb_front 24 - when "0110" => + -- sys_vga_fb_front + -- 0x18 + when "00110" => SDAT_O <= vga_fb_front; - -- sys_vga_fb_back 28 - when "0111" => + -- sys_vga_fb_back + -- 0x1C + when "00111" => SDAT_O <= vga_fb_back; - -- sys_blit_addr_src_0 32 - when "1000" => + -- sys_blit_descr_src_0 + -- 0x20 + when "01000" => SDAT_O <= blit_addr_src_0; - -- sys_blit_addr_src_1 36 - when "1001" => - SDAT_O <= blit_addr_src_1; - - -- sys_blit_addr_dst 40 - when "1010" => - SDAT_O <= blit_addr_dst; - - -- sys_blit_dimx_src_0 44 - when "1011" => + -- 0x28 + when "01010" => SDAT_O <= blit_dimx_src_0; - -- sys_blit_dimx_src_1 48 - when "1100" => + -- sys_blit_descr_src_1 + -- 0x30 + when "01100" => + SDAT_O <= blit_addr_src_1; + + -- 0x38 + when "01110" => SDAT_O <= blit_dimx_src_1; - -- sys_blit_dimx_dst 52 - when "1101" => + -- sys_blit_descr_dst + -- 0x50 + when "10100" => + SDAT_O <= blit_addr_dst; + + -- 0x58 + when "10110" => SDAT_O <= blit_dimx_dst; - -- sys_blit_nx 56 - when "1110" => + -- sys_blit_nx + -- 0x60 + when "11000" => SDAT_O <= host_blit_nx; - -- sys_blit_ny 60 - when "1111" => + -- sys_blit_ny + -- 0x64 + when "11001" => SDAT_O <= blit_ny; when others => null; @@ -803,10 +816,11 @@ registers_write: host_fb_back <= X"40010000"; cg_color <= (X"FF", X"FF", X"FF", X"FF"); elsif (STB_I and CYC_I and WE_I) = '1' then - case ADDR_I(5 downto 2) is + case ADDR_I(6 downto 2) is - -- sys_vga_ctrl 0 - when "0000" => + -- sys_vga_ctrl + -- 0x00 + when "00000" => vga_scan_dma_en <= SDAT_I(1); bufchg_irq_en <= SDAT_I(2); bufchg_flag_ack <= SDAT_I(3); @@ -818,65 +832,76 @@ registers_write: blit_func_sel <= SDAT_I(19 downto 16); blit_comb_sel <= SDAT_I(23 downto 20); - -- sys_vga_ascii 4 - when "0001" => + -- sys_vga_ascii + -- 0x04 + when "00001" => cg_ascii_we <= '1'; cg_din <= SDAT_I(7 downto 0); - -- sys_vga_posx 8 - when "0010" => + -- sys_vga_posx + -- 0x08 + when "00010" => cg_posx_we <= '1'; cg_din <= SDAT_I(7 downto 0); - -- sys_vga_posy 12 - when "0011" => + -- sys_vga_posy + -- 0x0C + when "00011" => cg_posy_we <= '1'; cg_din <= SDAT_I(7 downto 0); - -- sys_vga_cgcol 16 - when "0100" => + -- sys_vga_cgcol + -- 0x10 + when "00100" => cg_color <= to_color_t(SDAT_I(31 downto 0)); - -- sys_vga_fb_front 24 - when "0110" => + -- sys_vga_fb_front + -- 0x18 + when "00110" => host_fb_front <= SDAT_I(31 downto 3) & "000"; - -- sys_vga_fb_back 28 - when "0111" => + -- sys_vga_fb_back + -- 0x1C + when "00111" => bufchg_flag_ack <= '1'; host_fb_back <= SDAT_I(31 downto 3) & "000"; - -- sys_blit_addr_src_0 32 - when "1000" => + -- sys_blit_descr_src_0 + -- 0x20 + when "01000" => blit_addr_src_0 <= SDAT_I(31 downto 3) & "000"; - -- sys_blit_addr_src_1 36 - when "1001" => - blit_addr_src_1 <= SDAT_I(31 downto 3) & "000"; - - -- sys_blit_addr_dst 40 - when "1010" => - blit_addr_dst <= SDAT_I(31 downto 3) & "000"; - - -- sys_blit_dimx_src_0 44 - when "1011" => + -- 0x28 + when "01010" => blit_dimx_src_0 <= SDAT_I(31 downto 3) & "000"; - -- sys_blit_dimx_src_1 48 - when "1100" => + -- sys_blit_descr_src_1 + -- 0x30 + when "01100" => + blit_addr_src_1 <= SDAT_I(31 downto 3) & "000"; + + -- 0x38 + when "01110" => blit_dimx_src_1 <= SDAT_I(31 downto 3) & "000"; - -- sys_blit_dimx_dst 52 - when "1101" => + -- sys_blit_descr_dst + -- 0x50 + when "10100" => + blit_addr_dst <= SDAT_I(31 downto 3) & "000"; + + -- 0x58 + when "10110" => blit_dimx_dst <= SDAT_I(31 downto 3) & "000"; - -- sys_blit_nx 56 - when "1110" => + -- sys_blit_nx + -- 0x60 + when "11000" => host_blit_nx <= SDAT_I; blit_nx <= '0' & SDAT_I(31 downto 1); - -- sys_blit_ny 60 - when "1111" => + -- sys_blit_ny + -- 0x64 + when "11001" => blit_ny <= SDAT_I; when others => null;