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[J-Uart]

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- use LSB first for UART
- Uart_wb: added generic for default baudrate and fifo depth

git-svn-id: http://moon:8086/svn/vhdl/trunk@1358 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2016-12-21 19:58:11 +00:00
parent e76ab469ca
commit 9a188d8b8a
4 changed files with 23 additions and 5 deletions
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lib/uart/uart_wb.vhd
+7 -1
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@@ -6,6 +6,12 @@ LIBRARY WORK;
USE WORK.uart_types.all;
ENTITY uart_wb IS
Generic
(
f_sysclk : real := 100.0e6;
baudrate_default : real := 115200.0;
fifo_depth_bits : integer := 4
);
Port
(
CLK_I : in STD_LOGIC;
@@ -86,7 +92,7 @@ registers_write:
if rising_edge(CLK_I) then
reg_we_uart_tx <= '0';
if RST_I = '1' then
reg_uart_baud <= to_unsigned(53, 16);
reg_uart_baud <= to_unsigned(integer(0.5+f_sysclk/(16.0*baudrate_default))-1, 16);
rx_int_en <= '0';
tx_int_en <= '0';
elsif (STB_I and CYC_I and WE_I) = '1' then