diff --git a/projects/mips_sys/ise101/mips_sys/mips_sys.prj b/projects/mips_sys/ise101/mips_sys/mips_sys.prj
index 95ab788..4559a1f 100644
--- a/projects/mips_sys/ise101/mips_sys/mips_sys.prj
+++ b/projects/mips_sys/ise101/mips_sys/mips_sys.prj
@@ -9,7 +9,6 @@ vhdl work "../../../../lib/FIFO/src/sync_fifo_ctrl.vhd"
 vhdl work "../../../../lib/FIFO/src/gray_counter.vhd"
 vhdl work "../../../../lib/VGA_ctrl/src/vga_timing.vhd"
 vhdl work "../../../../lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x16.vhd"
-vhdl work "../../../../lib/VGA_ctrl/src/dpram.vhd"
 vhdl work "../../../../lib/VGA_ctrl/src/clkgen_virtex4.vhd"
 vhdl work "../../../../lib/uart/kcuart_tx.vhd"
 vhdl work "../../../../lib/uart/kcuart_rx.vhd"
@@ -25,14 +24,14 @@ vhdl work "../../src/sys_types.vhd"
 vhdl work "../../src/ram_ld.vhd"
 vhdl work "../../src/bootloader.ROM_ld.vhd"
 vhdl work "../../../../lib/VGA_ctrl/src/vga_backend.vhd"
-vhdl work "../../../../lib/VGA_ctrl/src/linefifo.vhd"
 vhdl work "../../../../lib/VGA_ctrl/src/char_gen.vhd"
 vhdl work "../../../../lib/uart/uart_tx.vhd"
 vhdl work "../../../../lib/uart/uart_rx.vhd"
 vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd"
-vhdl work "../../../../lib/VGA_ctrl/src/vga_frontend.vhd"
+vhdl work "../../../../lib/FIFO/src/fifo_async.vhd"
+vhdl work "../../../../lib/VGA_ctrl/src/vga_frontend64.vhd"
 vhdl work "../../../../lib/uart/uart_wb.vhd"
-vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd"
+vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd"
 vhdl work "../../../../lib/misc/rom_wb.vhd"
 vhdl work "../../../../lib/misc/ram_wb.vhd"
 vhdl work "../../../../lib/misc/lcd_port.vhd"
diff --git a/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj b/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj
index 58e3c54..f9b9526 100644
--- a/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj
+++ b/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj
@@ -9,7 +9,6 @@ vhdl work "W:\vhdl\lib\FIFO\src\sync_fifo_ctrl.vhd"
 vhdl work "W:\vhdl\lib\FIFO\src\gray_counter.vhd"
 vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_timing.vhd"
 vhdl work "W:\vhdl\lib\VGA_ctrl\src\fonts\char_rom_fixedsys_8x16.vhd"
-vhdl work "W:\vhdl\lib\VGA_ctrl\src\dpram.vhd"
 vhdl work "W:\vhdl\lib\VGA_ctrl\src\clkgen_virtex4.vhd"
 vhdl work "W:\vhdl\lib\uart\kcuart_tx.vhd"
 vhdl work "W:\vhdl\lib\uart\kcuart_rx.vhd"
@@ -25,14 +24,14 @@ vhdl work "W:\vhdl\projects\mips_sys\src\sys_types.vhd"
 vhdl work "W:\vhdl\projects\mips_sys\src\ram_ld.vhd"
 vhdl work "W:\vhdl\projects\mips_sys\src\bootloader.ROM_ld.vhd"
 vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_backend.vhd"
-vhdl work "W:\vhdl\lib\VGA_ctrl\src\linefifo.vhd"
 vhdl work "W:\vhdl\lib\VGA_ctrl\src\char_gen.vhd"
 vhdl work "W:\vhdl\lib\uart\uart_tx.vhd"
 vhdl work "W:\vhdl\lib\uart\uart_rx.vhd"
 vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_top.vhd"
-vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_frontend.vhd"
+vhdl work "W:\vhdl\lib\FIFO\src\fifo_async.vhd"
+vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_frontend64.vhd"
 vhdl work "W:\vhdl\lib\uart\uart_wb.vhd"
-vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_frontend_wb.vhd"
+vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_frontend64_wb.vhd"
 vhdl work "W:\vhdl\lib\misc\rom_wb.vhd"
 vhdl work "W:\vhdl\lib\misc\ram_wb.vhd"
 vhdl work "W:\vhdl\lib\misc\lcd_port.vhd"