diff --git a/lib/CPUs/MIPS/src/core/dcache.vhd b/lib/CPUs/MIPS/src/core/dcache.vhd
index 8c296a7..b9f9f8f 100644
--- a/lib/CPUs/MIPS/src/core/dcache.vhd
+++ b/lib/CPUs/MIPS/src/core/dcache.vhd
@@ -92,14 +92,13 @@ END COMPONENT;
 	constant cache_index_width	: natural := lg2(cache_size) - word_index_width;
 	constant tag_width			: natural := 32 - word_index_width - cache_index_width - 2;
 	constant tag_parity_width	: natural := 3;
-	constant tram_data_width	: natural := 2 + tag_parity_width + tag_width;
+	constant tram_data_width	: natural := 1 + tag_parity_width + tag_width;
 	constant tram_addr_width	: natural := cache_index_width;
 	
 	subtype	tram_data_t is unsigned (tram_data_width-1 downto 0);
 
 	type dcache_entry_t is record
 		valid	: std_logic;
-		dirty	: std_logic;
 		tv_p	: unsigned(tag_parity_width-1 downto 0);
 		tag		: unsigned(tag_width-1 downto 0);
 	end record;
@@ -112,9 +111,8 @@ END COMPONENT;
 	variable result : dcache_entry_t;
 	begin
 		result.valid	:= x(0);
-		result.dirty	:= x(1);
-		result.tv_p		:= x(4 downto 2);
-		result.tag		:= x(tag_width+4 downto 5);
+		result.tv_p		:= x(3 downto 1);
+		result.tag		:= x(tag_width+3 downto 4);
 		
 		return result;
 	end to_dcache_entry;
@@ -123,9 +121,8 @@ END COMPONENT;
 	variable result : tram_data_t;
 	begin
 		result(0)										:= x.valid;
-		result(1)										:= x.dirty;
-		result(4 downto 2)								:= x.tv_p;
-		result(tag_width+4 downto 5)					:= x.tag;
+		result(3 downto 1)								:= x.tv_p;
+		result(tag_width+3 downto 4)					:= x.tag;
 		
 		return result;
 	end to_tram_data;
@@ -321,7 +318,6 @@ cache_state:
 		cache_entry_in.tv_p		<= (others => '0');
 		cache_entry_in.tag		<= tag_index_reg;
 		cache_entry_in.valid	<= '0';
-		cache_entry_in.dirty	<= '0';
 		sn	<= s;
 		
 		case s is