From 965590d3830b0031231c4c438cc7adf6d43fe177 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sun, 24 May 2015 10:44:20 +0000 Subject: [PATCH] - renamed config constants git-svn-id: http://moon:8086/svn/vhdl/trunk@1203 cc03376c-175c-47c8-b038-4cd826a8556b --- projects/mips_sys/src/mips_sys.vhd | 10 +++++----- projects/mips_sys/src/mips_sys_sim.vhd | 10 +++++----- projects/mips_sys/src/sdram_config.vhd | 15 ++++++++++----- projects/mips_sys/src/sdram_config_sim.vhd | 15 ++++++++++----- 4 files changed, 30 insertions(+), 20 deletions(-) diff --git a/projects/mips_sys/src/mips_sys.vhd b/projects/mips_sys/src/mips_sys.vhd index 61c0b6b..6c69059 100644 --- a/projects/mips_sys/src/mips_sys.vhd +++ b/projects/mips_sys/src/mips_sys.vhd @@ -82,11 +82,11 @@ PORT sys_sdr_ras_qn : out std_logic; -- /ras sys_sdr_cas_qn : out std_logic; -- /cas sys_sdr_we_qn : out std_logic; -- /write enable - sys_sdr_dm_q : out unsigned(DDR_DM_WIDTH-1 downto 0); -- data mask bits, set to "00" - sys_sdr_dqs_q : inout unsigned(DDR_DQS_WIDTH-1 downto 0); -- data strobe, only for write - sys_sdr_ba_q : out unsigned(DDR_BANK_WIDTH-1 downto 0); -- bank select - sys_sdr_a_q : out unsigned(DDR_ADDR_WIDTH-1 downto 0); -- address bus - sys_sdr_data : inout unsigned(DDR_DATA_WIDTH-1 downto 0); -- bidir data bus + sys_sdr_dm_q : out unsigned(PART_DM_WIDTH-1 downto 0); -- data mask bits, set to "00" + sys_sdr_dqs_q : inout unsigned(PART_DQS_WIDTH-1 downto 0); -- data strobe, only for write + sys_sdr_ba_q : out unsigned(PART_BANK_WIDTH-1 downto 0); -- bank select + sys_sdr_a_q : out unsigned(PART_ADDR_WIDTH-1 downto 0); -- address bus + sys_sdr_data : inout unsigned(PART_DATA_WIDTH-1 downto 0); -- bidir data bus sys_sdr_clk_fb : in std_logic; -- VGA diff --git a/projects/mips_sys/src/mips_sys_sim.vhd b/projects/mips_sys/src/mips_sys_sim.vhd index 5337467..4f83a5c 100644 --- a/projects/mips_sys/src/mips_sys_sim.vhd +++ b/projects/mips_sys/src/mips_sys_sim.vhd @@ -79,11 +79,11 @@ PORT sys_sdr_ras_qn : out std_logic; -- /ras sys_sdr_cas_qn : out std_logic; -- /cas sys_sdr_we_qn : out std_logic; -- /write enable - sys_sdr_dm_q : out unsigned(DDR_DM_WIDTH-1 downto 0); -- data mask bits, set to "00" - sys_sdr_dqs_q : inout unsigned(DDR_DQS_WIDTH-1 downto 0); -- data strobe, only for write - sys_sdr_ba_q : out unsigned(DDR_BANK_WIDTH-1 downto 0); -- bank select - sys_sdr_a_q : out unsigned(DDR_ADDR_WIDTH-1 downto 0); -- address bus - sys_sdr_data : inout unsigned(DDR_DATA_WIDTH-1 downto 0); -- bidir data bus + sys_sdr_dm_q : out unsigned(PART_DM_WIDTH-1 downto 0); -- data mask bits, set to "00" + sys_sdr_dqs_q : inout unsigned(PART_DQS_WIDTH-1 downto 0); -- data strobe, only for write + sys_sdr_ba_q : out unsigned(PART_BANK_WIDTH-1 downto 0); -- bank select + sys_sdr_a_q : out unsigned(PART_ADDR_WIDTH-1 downto 0); -- address bus + sys_sdr_data : inout unsigned(PART_DATA_WIDTH-1 downto 0); -- bidir data bus sys_sdr_clk_fb : in std_logic; -- VGA diff --git a/projects/mips_sys/src/sdram_config.vhd b/projects/mips_sys/src/sdram_config.vhd index c964e6b..fe869f6 100644 --- a/projects/mips_sys/src/sdram_config.vhd +++ b/projects/mips_sys/src/sdram_config.vhd @@ -27,12 +27,17 @@ USE IEEE.NUMERIC_STD.ALL; package sdram_config is - constant DDR_DATA_WIDTH : positive := 32; -- External DDR-SDRAM Module data bus width - constant DDR_ADDR_WIDTH : positive := 13; -- number of address lines to DDR-SDRAM Device/Module - constant DDR_BANK_WIDTH : positive := 2; -- Number of BANK address lines of external DDR-SDRAM - constant DDR_ROW_ADDR_WIDTH : positive := 13; -- - constant DDR_COL_ADDR_WIDTH : positive := 9; -- + constant PART_DATA_WIDTH : positive := 32; -- External DDR-SDRAM Module data bus width + constant PART_ADDR_WIDTH : positive := 13; -- number of address lines to DDR-SDRAM Device/Module + constant PART_BANK_WIDTH : positive := 2; -- Number of BANK address lines of external DDR-SDRAM + constant PART_ROW_ADDR_WIDTH : positive := 13; -- + constant PART_COL_ADDR_WIDTH : positive := 9; -- + constant PART_DQS_WIDTH : positive := PART_DATA_WIDTH / 8; -- Number of data strobe lines + constant PART_DM_WIDTH : positive := PART_DATA_WIDTH / 8; -- Number of Data Mask Lines + constant BUS_DATA_WIDTH : positive := 2*PART_DATA_WIDTH; -- DDR => twice part data width + constant BUS_DM_WIDTH : positive := 2*PART_DM_WIDTH; -- DDR => twice part data width + constant LMR_REG_BASE : natural := 0; constant LMR_REG_EXTENDED : natural := 1; constant LMR_OP_NORMAL : natural := 0; diff --git a/projects/mips_sys/src/sdram_config_sim.vhd b/projects/mips_sys/src/sdram_config_sim.vhd index 5067520..95b6adc 100644 --- a/projects/mips_sys/src/sdram_config_sim.vhd +++ b/projects/mips_sys/src/sdram_config_sim.vhd @@ -27,12 +27,17 @@ USE IEEE.NUMERIC_STD.ALL; package sdram_config is - constant DDR_DATA_WIDTH : positive := 32; -- External DDR-SDRAM Module data bus width - constant DDR_ADDR_WIDTH : positive := 13; -- number of address lines to DDR-SDRAM Device/Module - constant DDR_BANK_WIDTH : positive := 2; -- Number of BANK address lines of external DDR-SDRAM - constant DDR_ROW_ADDR_WIDTH : positive := 13; -- - constant DDR_COL_ADDR_WIDTH : positive := 9; -- + constant PART_DATA_WIDTH : positive := 32; -- External DDR-SDRAM Module data bus width + constant PART_ADDR_WIDTH : positive := 13; -- number of address lines to DDR-SDRAM Device/Module + constant PART_BANK_WIDTH : positive := 2; -- Number of BANK address lines of external DDR-SDRAM + constant PART_ROW_ADDR_WIDTH : positive := 13; -- + constant PART_COL_ADDR_WIDTH : positive := 9; -- + constant PART_DQS_WIDTH : positive := PART_DATA_WIDTH / 8; -- Number of data strobe lines + constant PART_DM_WIDTH : positive := PART_DATA_WIDTH / 8; -- Number of Data Mask Lines + constant BUS_DATA_WIDTH : positive := 2*PART_DATA_WIDTH; -- DDR => twice part data width + constant BUS_DM_WIDTH : positive := 2*PART_DM_WIDTH; -- DDR => twice part data width + constant LMR_REG_BASE : natural := 0; constant LMR_REG_EXTENDED : natural := 1; constant LMR_OP_NORMAL : natural := 0;