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VGA: refactored clocks and resets

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1597 cc03376c-175c-47c8-b038-4cd826a8556b
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jens
2021-03-30 08:57:09 +00:00
parent 82f64d5e06
commit 95a989a001
1 changed files with 6 additions and 7 deletions
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projects/mips_sys/src/mips_sys.vhd
+6 -7
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@@ -330,8 +330,8 @@ ARCHITECTURE behavior OF mips_sys IS
SDAT_O : out unsigned(31 downto 0);
-- VGA signals
vga_clk_in : in std_logic;
vga_clk_ce : in std_logic;
vga_clk : in std_logic;
vga_rst : in std_logic;
vga_red : out unsigned(7 downto 0);
vga_green : out unsigned(7 downto 0);
vga_blue : out unsigned(7 downto 0);
@@ -346,7 +346,6 @@ ARCHITECTURE behavior OF mips_sys IS
signal eb : std_logic;
signal vga_clk : std_logic;
signal vga_rst : std_logic;
signal vga_ce : std_logic;
signal rst_in : std_logic;
signal int_timer : std_logic;
signal int_uart0 : std_logic;
@@ -495,6 +494,7 @@ ARCHITECTURE behavior OF mips_sys IS
attribute KEEP : string;
attribute KEEP of gmii_clk : signal is "TRUE";
attribute KEEP of vga_clk : signal is "TRUE";
attribute KEEP of vga_rst : signal is "TRUE";
attribute KEEP of CLK_O : signal is "TRUE";
attribute KEEP of RST_O : signal is "TRUE";
@@ -543,8 +543,7 @@ BEGIN
sys_uart3_tx <= sys_uart3_rx;
sys_vga_clk <= vga_clk;
vga_ce <= not vga_rst;
sys_phy_gtx_clk <= gmii_clk;
sys_phy_gtx_clk <= gmii_clk;
---------------------------------------------------------------
-- Arbiter
@@ -1025,8 +1024,8 @@ inst_vga_frontend : vga_frontend_jb64
SDAT_O => SDAT_O_vga,
-- VGA signals
vga_clk_in => vga_clk,
vga_clk_ce => vga_ce,
vga_clk => vga_clk,
vga_rst => vga_rst,
vga_red => sys_vga_red,
vga_green => sys_vga_green,
vga_blue => sys_vga_blue,