From 93ffa53c6073da5d85065a57ad09cdd0f25acb1f Mon Sep 17 00:00:00 2001
From: Jens Ahrensfeld <jens@jayfield.org>
Date: Tue, 23 Mar 2021 21:19:25 +0000
Subject: [PATCH] - added ghdl make for unisim - refactored

git-svn-id: http://moon:8086/svn/vhdl/trunk@1505 cc03376c-175c-47c8-b038-4cd826a8556b
---
 Common/sim/ieee_proposed.make                 | 31 +++++++++++++++++++
 .../modelsim/Makefile.ghdl => unisim.make}    | 23 +++++++-------
 2 files changed, 42 insertions(+), 12 deletions(-)
 create mode 100644 Common/sim/ieee_proposed.make
 rename Common/sim/{ieee_proposed/modelsim/Makefile.ghdl => unisim.make} (53%)

diff --git a/Common/sim/ieee_proposed.make b/Common/sim/ieee_proposed.make
new file mode 100644
index 0000000..1e5a658
--- /dev/null
+++ b/Common/sim/ieee_proposed.make
@@ -0,0 +1,31 @@
+# -------------------------------------------------
+# Compile script for GHDL
+# -------------------------------------------------
+
+# -------------------------------------------------
+# Global options
+# -------------------------------------------------
+LANG_STD := 93c
+IEEE_STD := standard
+WORK_LIB := ieee_proposed
+
+
+# -------------------------------------------------
+# Target options
+# -------------------------------------------------
+TARGET := ieee_proposed
+
+LIB_PATH := ieee_proposed/modelsim
+
+SRCS := $(LIB_PATH)/standard_additions_c.vhdl
+SRCS += $(LIB_PATH)/standard_textio_additions_c.vhdl
+SRCS += $(LIB_PATH)/env_c.vhdl
+SRCS += $(LIB_PATH)/std_logic_1164_additions.vhdl
+SRCS += $(LIB_PATH)/numeric_std_additions.vhdl
+SRCS += $(LIB_PATH)/numeric_std_unsigned_c.vhdl
+SRCS += $(LIB_PATH)/fixed_float_types_c.vhdl
+SRCS += $(LIB_PATH)/fixed_pkg_c.vhdl
+SRCS += $(LIB_PATH)/float_pkg_c.vhdl
+
+include ../make/ghdl.mk
+
diff --git a/Common/sim/ieee_proposed/modelsim/Makefile.ghdl b/Common/sim/unisim.make
similarity index 53%
rename from Common/sim/ieee_proposed/modelsim/Makefile.ghdl
rename to Common/sim/unisim.make
index 3cba883..339f380 100644
--- a/Common/sim/ieee_proposed/modelsim/Makefile.ghdl
+++ b/Common/sim/unisim.make
@@ -7,23 +7,22 @@
 # -------------------------------------------------
 LANG_STD := 93c
 IEEE_STD := standard
-WORK_LIB := ieee_proposed
+WORK_LIB := unisim
 
 
 # -------------------------------------------------
 # Target options
 # -------------------------------------------------
-TARGET := ghdl
+TARGET := unisim
+LIB_PATH := xilinx/libsrc
 
-SRCS := standard_additions_c.vhdl
-SRCS += standard_textio_additions_c.vhdl
-SRCS += env_c.vhdl
-SRCS += std_logic_1164_additions.vhdl
-SRCS += numeric_std_additions.vhdl
-SRCS += numeric_std_unsigned_c.vhdl
-SRCS += fixed_float_types_c.vhdl
-SRCS += fixed_pkg_c.vhdl
-SRCS += float_pkg_c.vhdl
+SRCS := $(LIB_PATH)/unisims/unisim_VPKG.vhd
+SRCS += $(LIB_PATH)/unisims/unisim_VCOMP.vhd
+SRCS += $(LIB_PATH)/unisims/unisim_SMODEL.vhd
+SRCS += $(LIB_PATH)/unisims/unisim_VITAL.vhd
+
+GHDL_OPTS := -fsynopsys -fexplicit
+
+include ../make/ghdl.mk
 
-include ../../../make/ghdl.mk