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- uses common fixed_pkg

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git-svn-id: http://moon:8086/svn/vhdl/trunk@242 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-01-14 09:43:36 +00:00
parent 0c8a1c2ec5
commit 9163ced247
6 changed files with 48 additions and 28 deletions
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lib/radio/mix/sim/tb_mix_cpx.fdo
+4 -2
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@@ -1,8 +1,10 @@
vmap ieee_proposed ../../../../Common/sim/ieee_proposed
vlib work vlib work
vcom -explicit -93 "../../../../lib/fixed/fixed_pkg_c.vhd" vcom -explicit -93 "../../../fixed/fixed_util_pkg.vhd"
vcom -explicit -93 "../../../misc/utils_pkg.vhd"
vcom -explicit -93 "../../../../lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd" vcom -explicit -93 "../../../../lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd"
vcom -explicit -93 "../../../../lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd" vcom -explicit -93 "../../../../lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd"
vcom -explicit -93 "../src/mix_pkg.vhd"
vcom -explicit -93 "../src/mix_cpx.vhd" vcom -explicit -93 "../src/mix_cpx.vhd"
vcom -explicit -93 "../src/tb_mix_cpx.vhd" vcom -explicit -93 "../src/tb_mix_cpx.vhd"
vsim -t 1ps -lib work tb_mix_cpx vsim -t 1ps -lib work tb_mix_cpx
lib/radio/mix/sim/tb_mix_real.fdo
+4 -2
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@@ -1,8 +1,10 @@
vmap ieee_proposed ../../../../Common/sim/ieee_proposed
vlib work vlib work
vcom -explicit -93 "../../../../lib/fixed/fixed_pkg_c.vhd" vcom -explicit -93 "../../../fixed/fixed_util_pkg.vhd"
vcom -explicit -93 "../../../misc/utils_pkg.vhd"
vcom -explicit -93 "../../../../lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd" vcom -explicit -93 "../../../../lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd"
vcom -explicit -93 "../../../../lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd" vcom -explicit -93 "../../../../lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd"
vcom -explicit -93 "../src/mix_pkg.vhd"
vcom -explicit -93 "../src/mix_real.vhd" vcom -explicit -93 "../src/mix_real.vhd"
vcom -explicit -93 "../src/tb_mix_real.vhd" vcom -explicit -93 "../src/tb_mix_real.vhd"
vsim -t 1ps -lib work tb_mix_real vsim -t 1ps -lib work tb_mix_real
lib/radio/mix/src/mix_cpx.vhd
+11 -6
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@@ -21,8 +21,13 @@ library IEEE;
use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_1164.ALL;
use IEEE.MATH_REAL.ALL; use IEEE.MATH_REAL.ALL;
USE ieee.numeric_std.ALL; USE ieee.numeric_std.ALL;
use work.fixed_pkg.all;
use work.mix_pkg.all; library ieee_proposed;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_pkg.all;
library work;
use work.fixed_util_pkg.all;
---- Uncomment the following library declaration if instantiating ---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code. ---- any Xilinx primitives in this code.
@@ -39,8 +44,8 @@ Generic
has_in_reg : boolean := false; has_in_reg : boolean := false;
has_pipe_reg : boolean := false; has_pipe_reg : boolean := false;
has_out_reg : boolean := false; has_out_reg : boolean := false;
rounding : boolean := true; rounding : fixed_round_style_type := fixed_round;
saturating : boolean := true saturating : fixed_overflow_style_type := fixed_saturate
); );
Port Port
( (
@@ -141,8 +146,8 @@ begin
variable sum_re : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low); variable sum_re : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low);
variable sum_im : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low); variable sum_im : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low);
begin begin
sum_re := resize(scalb(p_re_left - p_re_right, nbits_scale_z), re, rounding, saturating); sum_re := resize(scalb(p_re_left - p_re_right, nbits_scale_z), re, saturating, rounding);
sum_im := resize(scalb(p_im_left + p_im_right, nbits_scale_z), im, rounding, saturating); sum_im := resize(scalb(p_im_left + p_im_right, nbits_scale_z), im, saturating, rounding);
if has_out_reg = true then if has_out_reg = true then
if rising_edge(clk) then if rising_edge(clk) then
if srst = '1' then if srst = '1' then
lib/radio/mix/src/mix_real.vhd
+11 -6
View File
@@ -21,8 +21,13 @@ library IEEE;
use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_1164.ALL;
use IEEE.MATH_REAL.ALL; use IEEE.MATH_REAL.ALL;
USE ieee.numeric_std.ALL; USE ieee.numeric_std.ALL;
use work.fixed_pkg.all;
use work.mix_pkg.all; library ieee_proposed;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_pkg.all;
library work;
use work.fixed_util_pkg.all;
---- Uncomment the following library declaration if instantiating ---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code. ---- any Xilinx primitives in this code.
@@ -39,8 +44,8 @@ Generic
has_in_reg : boolean := false; has_in_reg : boolean := false;
has_pipe_reg : boolean := false; has_pipe_reg : boolean := false;
has_out_reg : boolean := false; has_out_reg : boolean := false;
rounding : boolean := true; rounding : fixed_round_style_type := fixed_round;
saturating : boolean := true saturating : fixed_overflow_style_type := fixed_saturate
); );
Port Port
( (
@@ -130,8 +135,8 @@ begin
variable sum_re : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low); variable sum_re : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low);
variable sum_im : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low); variable sum_im : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low);
begin begin
sum_re := resize(scalb(p_re_left, nbits_scale_z), re, rounding, saturating); sum_re := resize(scalb(p_re_left, nbits_scale_z), re, saturating, rounding);
sum_im := resize(scalb(p_im_left, nbits_scale_z), im, rounding, saturating); sum_im := resize(scalb(p_im_left, nbits_scale_z), im, saturating, rounding);
if has_out_reg = true then if has_out_reg = true then
if rising_edge(clk) then if rising_edge(clk) then
if srst = '1' then if srst = '1' then
lib/radio/mix/src/tb_mix_cpx.vhd
+9 -6
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@@ -17,9 +17,12 @@ use IEEE.MATH_REAL.ALL;
USE ieee.numeric_std.ALL; USE ieee.numeric_std.ALL;
use std.textio.all; -- Imports the standard textio package. use std.textio.all; -- Imports the standard textio package.
library ieee_proposed;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_pkg.all;
library work; library work;
use work.fixed_pkg.all; use work.fixed_util_pkg.all;
use work.mix_pkg.all;
use work.PCK_FIO.all; use work.PCK_FIO.all;
ENTITY tb_mix_cpx IS ENTITY tb_mix_cpx IS
@@ -32,8 +35,8 @@ ENTITY tb_mix_cpx IS
has_in_reg : boolean := true; has_in_reg : boolean := true;
has_pipe_reg : boolean := true; has_pipe_reg : boolean := true;
has_out_reg : boolean := true; has_out_reg : boolean := true;
rounding : boolean := true; rounding : fixed_round_style_type := fixed_round;
saturating : boolean := true saturating : fixed_overflow_style_type := fixed_saturate
); );
END tb_mix_cpx; END tb_mix_cpx;
@@ -51,8 +54,8 @@ ARCHITECTURE behavior OF tb_mix_cpx IS
has_in_reg : boolean; has_in_reg : boolean;
has_pipe_reg : boolean; has_pipe_reg : boolean;
has_out_reg : boolean; has_out_reg : boolean;
rounding : boolean; rounding : fixed_round_style_type;
saturating : boolean saturating : fixed_overflow_style_type
); );
PORT PORT
( (
lib/radio/mix/src/tb_mix_real.vhd
+9 -6
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@@ -17,9 +17,12 @@ use IEEE.MATH_REAL.ALL;
USE ieee.numeric_std.ALL; USE ieee.numeric_std.ALL;
use std.textio.all; -- Imports the standard textio package. use std.textio.all; -- Imports the standard textio package.
library ieee_proposed;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_pkg.all;
library work; library work;
use work.fixed_pkg.all; use work.fixed_util_pkg.all;
use work.mix_pkg.all;
use work.PCK_FIO.all; use work.PCK_FIO.all;
ENTITY tb_mix_real IS ENTITY tb_mix_real IS
@@ -32,8 +35,8 @@ ENTITY tb_mix_real IS
has_in_reg : boolean := true; has_in_reg : boolean := true;
has_pipe_reg : boolean := true; has_pipe_reg : boolean := true;
has_out_reg : boolean := true; has_out_reg : boolean := true;
rounding : boolean := true; rounding : fixed_round_style_type := fixed_round;
saturating : boolean := true saturating : fixed_overflow_style_type := fixed_saturate
); );
END tb_mix_real; END tb_mix_real;
@@ -51,8 +54,8 @@ ARCHITECTURE behavior OF tb_mix_real IS
has_in_reg : boolean; has_in_reg : boolean;
has_pipe_reg : boolean; has_pipe_reg : boolean;
has_out_reg : boolean; has_out_reg : boolean;
rounding : boolean; rounding : fixed_round_style_type;
saturating : boolean saturating : fixed_overflow_style_type
); );
PORT PORT
( (