- uses common fixed_pkg

git-svn-id: http://moon:8086/svn/vhdl/trunk@242 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2009-01-14 09:43:36 +00:00
parent 0c8a1c2ec5
commit 9163ced247
6 changed files with 48 additions and 28 deletions
+11 -6
View File
@@ -21,8 +21,13 @@ library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.MATH_REAL.ALL;
USE ieee.numeric_std.ALL;
use work.fixed_pkg.all;
use work.mix_pkg.all;
library ieee_proposed;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_pkg.all;
library work;
use work.fixed_util_pkg.all;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
@@ -39,8 +44,8 @@ Generic
has_in_reg : boolean := false;
has_pipe_reg : boolean := false;
has_out_reg : boolean := false;
rounding : boolean := true;
saturating : boolean := true
rounding : fixed_round_style_type := fixed_round;
saturating : fixed_overflow_style_type := fixed_saturate
);
Port
(
@@ -141,8 +146,8 @@ begin
variable sum_re : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low);
variable sum_im : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low);
begin
sum_re := resize(scalb(p_re_left - p_re_right, nbits_scale_z), re, rounding, saturating);
sum_im := resize(scalb(p_im_left + p_im_right, nbits_scale_z), im, rounding, saturating);
sum_re := resize(scalb(p_re_left - p_re_right, nbits_scale_z), re, saturating, rounding);
sum_im := resize(scalb(p_im_left + p_im_right, nbits_scale_z), im, saturating, rounding);
if has_out_reg = true then
if rising_edge(clk) then
if srst = '1' then
+11 -6
View File
@@ -21,8 +21,13 @@ library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.MATH_REAL.ALL;
USE ieee.numeric_std.ALL;
use work.fixed_pkg.all;
use work.mix_pkg.all;
library ieee_proposed;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_pkg.all;
library work;
use work.fixed_util_pkg.all;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
@@ -39,8 +44,8 @@ Generic
has_in_reg : boolean := false;
has_pipe_reg : boolean := false;
has_out_reg : boolean := false;
rounding : boolean := true;
saturating : boolean := true
rounding : fixed_round_style_type := fixed_round;
saturating : fixed_overflow_style_type := fixed_saturate
);
Port
(
@@ -130,8 +135,8 @@ begin
variable sum_re : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low);
variable sum_im : sfixed(sproto(nbits_out, nbits_out_frac)'high downto sproto(nbits_out, nbits_out_frac)'low);
begin
sum_re := resize(scalb(p_re_left, nbits_scale_z), re, rounding, saturating);
sum_im := resize(scalb(p_im_left, nbits_scale_z), im, rounding, saturating);
sum_re := resize(scalb(p_re_left, nbits_scale_z), re, saturating, rounding);
sum_im := resize(scalb(p_im_left, nbits_scale_z), im, saturating, rounding);
if has_out_reg = true then
if rising_edge(clk) then
if srst = '1' then
+9 -6
View File
@@ -17,9 +17,12 @@ use IEEE.MATH_REAL.ALL;
USE ieee.numeric_std.ALL;
use std.textio.all; -- Imports the standard textio package.
library ieee_proposed;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_pkg.all;
library work;
use work.fixed_pkg.all;
use work.mix_pkg.all;
use work.fixed_util_pkg.all;
use work.PCK_FIO.all;
ENTITY tb_mix_cpx IS
@@ -32,8 +35,8 @@ ENTITY tb_mix_cpx IS
has_in_reg : boolean := true;
has_pipe_reg : boolean := true;
has_out_reg : boolean := true;
rounding : boolean := true;
saturating : boolean := true
rounding : fixed_round_style_type := fixed_round;
saturating : fixed_overflow_style_type := fixed_saturate
);
END tb_mix_cpx;
@@ -51,8 +54,8 @@ ARCHITECTURE behavior OF tb_mix_cpx IS
has_in_reg : boolean;
has_pipe_reg : boolean;
has_out_reg : boolean;
rounding : boolean;
saturating : boolean
rounding : fixed_round_style_type;
saturating : fixed_overflow_style_type
);
PORT
(
+9 -6
View File
@@ -17,9 +17,12 @@ use IEEE.MATH_REAL.ALL;
USE ieee.numeric_std.ALL;
use std.textio.all; -- Imports the standard textio package.
library ieee_proposed;
use ieee_proposed.math_utility_pkg.all;
use ieee_proposed.fixed_pkg.all;
library work;
use work.fixed_pkg.all;
use work.mix_pkg.all;
use work.fixed_util_pkg.all;
use work.PCK_FIO.all;
ENTITY tb_mix_real IS
@@ -32,8 +35,8 @@ ENTITY tb_mix_real IS
has_in_reg : boolean := true;
has_pipe_reg : boolean := true;
has_out_reg : boolean := true;
rounding : boolean := true;
saturating : boolean := true
rounding : fixed_round_style_type := fixed_round;
saturating : fixed_overflow_style_type := fixed_saturate
);
END tb_mix_real;
@@ -51,8 +54,8 @@ ARCHITECTURE behavior OF tb_mix_real IS
has_in_reg : boolean;
has_pipe_reg : boolean;
has_out_reg : boolean;
rounding : boolean;
saturating : boolean
rounding : fixed_round_style_type;
saturating : fixed_overflow_style_type
);
PORT
(