Force VCD

2022-06-30 22:12:43 +02:00
parent 110c3a24b4
commit 9148ac7087
3 changed files with 6 additions and 0 deletions
@@ -0,0 +1,4 @@
+.gitignore
+build/
+.gitignore
+build/
@@ -13,6 +13,7 @@ SRCS += $(MOD_PATH)/src/tb_busmaster_async.vhd
 TARGET := tb_busmaster_async
 ENTITY := tb_busmaster_async
 RUN_TIME := 80us
+WAVE_FORMAT := vcd

 include $(VHDL_HOME)/make/ghdl.mk

@@ -13,6 +13,7 @@ SRCS += $(MOD_PATH)/src/tb_busmaster_sync.vhd
 TARGET := tb_busmaster_sync
 ENTITY := tb_busmaster_sync
 RUN_TIME := 40us
+WAVE_FORMAT := vcd

 include $(VHDL_HOME)/make/ghdl.mk