diff --git a/lib/spi/src/spi_master.vhd b/lib/spi/src/spi_master.vhd
index e4b89b1..35292f9 100644
--- a/lib/spi/src/spi_master.vhd
+++ b/lib/spi/src/spi_master.vhd
@@ -248,7 +248,7 @@ begin
 end process;
 
 proc_fsm:
-process(state, rx_enable, cat_fifo_empty, cat_fifo_full, write_fifo_empty, write_fifo_full, xfer_count_busy, data_count_busy, shift_cnt_pipe, ctrl_reg)
+process(state, rx_enable, cat_fifo_empty, cat_fifo_full, write_fifo_empty, write_fifo_full, read_fifo_full, xfer_count_busy, data_count_busy, shift_cnt_pipe, ctrl_reg)
 begin
 	state_next		<= state;
 	
diff --git a/lib/spi/src/tb_spi_master.vhd b/lib/spi/src/tb_spi_master.vhd
index 15211d3..75364ca 100644
--- a/lib/spi/src/tb_spi_master.vhd
+++ b/lib/spi/src/tb_spi_master.vhd
@@ -191,6 +191,19 @@ STIMULUS: process
 		wait until rising_edge(CLK) and mst_cmd_rdy = '1';
 		mst_cmd_vld	<= '0';
 
+--------------------------------------------------------
+		wait until rising_edge(CLK);
+		mst_din			<= X"9F00_0000";
+		mst_din_vld		<= '1';
+		wait until rising_edge(CLK) and mst_din_rdy = '1';
+		mst_din_vld		<= '0';
+
+		wait until rising_edge(CLK);
+		mst_cmd		<= to_cmd(256, 8);
+		mst_cmd_vld	<= '1';
+		wait until rising_edge(CLK) and mst_cmd_rdy = '1';
+		mst_cmd_vld	<= '0';
+
 --------------------------------------------------------
 		wait until rising_edge(CLK);
 		mst_din			<= X"C3AA55C1";