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git-svn-id: http://moon:8086/svn/vhdl/trunk@1629 cc03376c-175c-47c8-b038-4cd826a8556b
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jens
2021-04-03 13:51:41 +00:00
parent 17e9bbad82
commit 8d0db9c098
3 changed files with 609 additions and 0 deletions
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lib/CPUs/JCpu/asm/xregs.inc.jsm
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; External registers
btn_port: equ 0x00 ; RO
led_port: equ 0x01 ; R/W
uart_data: equ 0x02 ; R/W
lcd_port: equ 0x03 ; R/W
ctrl_reg: equ 0x04 ; R/W
CTRL_VGA_ENABLE: equ 0x04
CTRL_TIMER_ENABLE: equ 0x02
dip_port: equ 0x05 ; RO
uart_status: equ 0x06 ; RO
sdram_reg: equ 0x07 ; R/W
FIFO_CTRL_IS_CMD: equ 0x04
FIFO_CTRL_IS_WRITE: equ 0x10
FIFO_CTRL_IS_READ: equ 0x20
FIFO_STAT_CMD_FULL: equ 0x01
FIFO_STAT_CMD_EMPTY: equ 0x02
FIFO_STAT_WRITE_DATA_FULL: equ 0x04
FIFO_STAT_WRITE_DATA_EMPTY: equ 0x08
FIFO_STAT_READ_DATA_FULL: equ 0x10
FIFO_STAT_READ_DATA_EMPTY: equ 0x20
sdram_addr: equ 0x08 ; R/W
sdram_addr0: equ 0x08 ; R/W
sdram_addr1: equ 0x09 ; R/W
sdram_addr2: equ 0x0A ; R/W
reg_cg_char_addr: equ 0x0B ; RW
reg_cg_line_addr: equ 0x0C ; RW
reg_cg_data: equ 0x0D ; RW
reg_cg_ctrl: equ 0x0E ; WO
reg_hwstat: equ 0x0E ; RO
reg_color_red: equ 0x10 ; RW
reg_color_grn: equ 0x11 ; RW
reg_color_blu: equ 0x12 ; RW
uart_baudrate: equ 0x13 ; R/W
vga_read_addr: equ 0x14 ; R/W
vga_read_addr0: equ 0x14 ; R/W
vga_read_addr1: equ 0x15 ; R/W
vga_read_addr2: equ 0x16 ; R/W
timer_reload: equ 0x17 ; R/W
timer_reload0: equ 0x17 ; R/W
timer_reload1: equ 0x18 ; R/W
timer_reload2: equ 0x19 ; R/W