diff --git a/lib/CPUs/MIPS/src/core/mips_tlb.vhd b/lib/CPUs/MIPS/src/core/mips_tlb.vhd
index 9a26051..c8cfe0a 100644
--- a/lib/CPUs/MIPS/src/core/mips_tlb.vhd
+++ b/lib/CPUs/MIPS/src/core/mips_tlb.vhd
@@ -261,34 +261,9 @@ inst_cam_va: entity work.cam
 
 	);
 
-proc_entry_lo_umc:
-	process(clk)
-	variable index : integer;
-	begin
-		if rising_edge(clk) then
-			if query_in.vld = '1' then
-				hit_umc		<= '0';
-				if query_in.vaddr(31 downto 29) = "100" then	-- 80000000 to  9FFFFFFF
-					hit_umc		<= '1';
-				end if;
-			end if;
-		end if;
-	end process;	
-
-proc_entry_lo_umuc:
-	process(clk)
-	variable index : integer;
-	begin
-		if rising_edge(clk) then
-			if query_in.vld = '1' then
-				hit_umuc		<= '0';
-				if query_in.vaddr(31 downto 29) = "101" then	-- A0000000 to  BFFFFFFF
-					hit_umuc		<= '1';
-				end if;
-			end if;
-		end if;
-	end process;	
-
+	hit_umc			<= '1' when vaddr_reg(31 downto 29) = "100" else '0';
+	hit_umuc		<= '1' when vaddr_reg(31 downto 29) = "101" else '0';
+	
 tlb_entry_lo_result_translate:
 if USE_TLB = true generate
 	tlb_entry_lo_result: