From 89723cf6d07a856bd3388c0cfea39334c06061c1 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sun, 11 Jan 2009 18:47:33 +0000 Subject: [PATCH] - Minor changes git-svn-id: http://moon:8086/svn/vhdl/trunk@231 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/filter/sim/tb_fir_semi_parallel.wdo | 9 +++++---- lib/filter/src/tb_fir_semi_parallel.vhd | 6 +++--- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/lib/filter/sim/tb_fir_semi_parallel.wdo b/lib/filter/sim/tb_fir_semi_parallel.wdo index 2379eb6..c85e95e 100644 --- a/lib/filter/sim/tb_fir_semi_parallel.wdo +++ b/lib/filter/sim/tb_fir_semi_parallel.wdo @@ -13,12 +13,11 @@ add wave -noupdate -divider {Real out} add wave -noupdate -format Analog-Step -height 50 -scale 50.0 /tb_fir_semi_parallel/xi add wave -noupdate -format Analog-Step -height 50 -scale 50.0 /tb_fir_semi_parallel/yo add wave -noupdate -divider -height 50 -add wave -noupdate -format Logic /tb_fir_semi_parallel/uut/en -add wave -noupdate -format Logic /tb_fir_semi_parallel/uut/ce0 add wave -noupdate -format Literal /tb_fir_semi_parallel/uut/count0 add wave -noupdate -format Logic /tb_fir_semi_parallel/din_vld add wave -noupdate -format Logic /tb_fir_semi_parallel/uut/start add wave -noupdate -format Literal -expand /tb_fir_semi_parallel/uut/count_array +add wave -noupdate -format Literal -expand /tb_fir_semi_parallel/uut/en_array add wave -noupdate -format Literal -expand /tb_fir_semi_parallel/uut/ce_array add wave -noupdate -format Literal /tb_fir_semi_parallel/uut/h_addr add wave -noupdate -format Logic /tb_fir_semi_parallel/uut/h_we @@ -34,6 +33,7 @@ add wave -noupdate -format Literal -radix decimal /tb_fir_semi_parallel/uut/gen_ add wave -noupdate -format Literal -radix decimal /tb_fir_semi_parallel/uut/gen_stages__0/inst_fir_stage/prod add wave -noupdate -format Literal -radix decimal /tb_fir_semi_parallel/uut/gen_stages__0/inst_fir_stage/x_out add wave -noupdate -format Literal -radix decimal /tb_fir_semi_parallel/uut/gen_stages__0/inst_fir_stage/y_out +add wave -noupdate -format Literal -radix decimal /tb_fir_semi_parallel/uut/gen_delays__0/inst_delay_line/inst_dpram_1w1r/ram add wave -noupdate -divider {stage 2} add wave -noupdate -format Logic /tb_fir_semi_parallel/uut/gen_stages__1/inst_fir_stage/clk add wave -noupdate -format Literal -radix decimal /tb_fir_semi_parallel/uut/gen_stages__1/inst_fir_stage/xin @@ -42,8 +42,9 @@ add wave -noupdate -format Literal -radix decimal /tb_fir_semi_parallel/uut/gen_ add wave -noupdate -format Literal -radix decimal /tb_fir_semi_parallel/uut/gen_stages__1/inst_fir_stage/prod add wave -noupdate -format Literal -radix decimal /tb_fir_semi_parallel/uut/gen_stages__1/inst_fir_stage/x_out add wave -noupdate -format Literal -radix decimal /tb_fir_semi_parallel/uut/gen_stages__1/inst_fir_stage/y_out +add wave -noupdate -format Literal -radix decimal /tb_fir_semi_parallel/uut/gen_delays__1/inst_delay_line/inst_dpram_1w1r/ram TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {486552931 ps} 0} {{Cursor 2} {5530000 ps} 0} {{Cursor 3} {148250000 ps} 0} +WaveRestoreCursors {{Cursor 1} {486552931 ps} 0} {{Cursor 2} {14808343 ps} 0} {{Cursor 3} {148250000 ps} 0} configure wave -namecolwidth 150 configure wave -valuecolwidth 100 configure wave -justifyvalue left @@ -57,4 +58,4 @@ configure wave -gridperiod 100 configure wave -griddelta 40 configure wave -timeline 1 update -WaveRestoreZoom {0 ps} {52500 ns} +WaveRestoreZoom {14757354 ps} {14943057 ps} diff --git a/lib/filter/src/tb_fir_semi_parallel.vhd b/lib/filter/src/tb_fir_semi_parallel.vhd index d7f36ad..b0ec1b7 100644 --- a/lib/filter/src/tb_fir_semi_parallel.vhd +++ b/lib/filter/src/tb_fir_semi_parallel.vhd @@ -31,8 +31,8 @@ use work.PCK_FIO.all; ENTITY tb_fir_semi_parallel IS Generic ( - ntaps_per_stage : integer := 32; - nstages : integer := 2; + ntaps_per_stage : integer := 16; + nstages : integer := 4; nbits_in : integer := 32; nbits_in_frac : integer := 30; nbits_stages : integer := 32; @@ -141,7 +141,7 @@ BEGIN ( ntaps_per_stage => ntaps_per_stage, nstages => nstages, - mul_latency => 5, + mul_latency => 2, nbits_in => nbits_in, nbits_in_frac => nbits_in_frac, nbits_stages => nbits_stages,