jens/vhdl
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

- MIPS core pulls Fifos

Browse Source 
git-svn-id: http://moon:8086/svn/vhdl/trunk@1543 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2021-03-28 10:42:44 +00:00
parent ef273a188a
commit 881893fda3
2 changed files with 6 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CPUs/MIPS/ghdl/tb_mips_top.make
-6
View File
@@ -2,14 +2,8 @@
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include mips_core.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
# FIFOS
SRCS += $(FIFO_SYNC_SRCS)
SRCS += $(FIFO_ASYNC_SRCS)
# UART
SRCS += $(LIB_PATH)/uart/src/uart_types.vhd
SRCS += $(LIB_PATH)/uart/src/sim/uart.vhd