jens/vhdl
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

- added

Browse Source 
git-svn-id: http://moon:8086/svn/vhdl/trunk@1183 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2015-05-23 15:37:00 +00:00
parent b9e398cd4b
commit 81b5e2f867
1 changed files with 24 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Common/sim/compile_altera.do
+24
View File
@@ -0,0 +1,24 @@
vlib altera
vcom -93 -work altera ../libsrc/altera/altera_primitives_components.vhd
vcom -93 -work altera ../libsrc/altera/altera_primitives.vhd
vcom -93 -work altera ../libsrc/altera/altera_internal_syn.vhd
vcom -93 -work altera ../libsrc/altera/altera_europa_support_lib.vhd
vcom -93 -work altera ../libsrc/altera/altera_standard_functions.vhd
vcom -93 -work altera ../libsrc/altera/altera_syn_attributes.vhd
vlib cycloneive
vcom -93 -work cycloneive ../libsrc/cycloneive/cycloneive_atoms.vhd
vcom -93 -work cycloneive ../libsrc/cycloneive/cycloneive_components.vhd
vlib altera_lnsim
vcom -93 -work altera_lnsim ../libsrc/altera_lnsim/altera_lnsim_components.vhd
#vmap work altera_lnsim
vlib cyclonev
vcom -93 -work cyclonev ../libsrc/cyclonev/cyclonev_atoms.vhd
vcom -93 -work cyclonev ../libsrc/cyclonev/cyclonev_components.vhd