From 791e97a8739063e3e142287b334e57ac03396dee Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sun, 18 Jan 2009 22:20:49 +0000 Subject: [PATCH] - update Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@264 cc03376c-175c-47c8-b038-4cd826a8556b --- projects/mips_sys/ise101/mips_sys/mips_sys.prj | 5 ++--- projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj | 5 ++--- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/projects/mips_sys/ise101/mips_sys/mips_sys.prj b/projects/mips_sys/ise101/mips_sys/mips_sys.prj index fa93c53..e41ce38 100644 --- a/projects/mips_sys/ise101/mips_sys/mips_sys.prj +++ b/projects/mips_sys/ise101/mips_sys/mips_sys.prj @@ -19,12 +19,10 @@ vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd" vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/reset_virtex4.vhd" vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd" vhdl work "../../../../lib/misc/dpram_2w2r_virtex4.vhd" -vhdl work "../../../../lib/misc/dpram_1w1r_dist.vhd" vhdl work "../../../../lib/FIFO/src/fifo_sync.vhd" vhdl work "../../../../lib/FIFO/src/async_fifo_ctrl.vhd" vhdl work "../../../../lib/ac97_ctrl/src/core/ac_out.vhd" vhdl work "../../../../lib/ac97_ctrl/src/core/ac_in.vhd" -vhdl work "../../src/sys_types.vhd" vhdl work "../../src/ram_ld.vhd" vhdl work "../../src/bootloader.ROM_ld.vhd" vhdl work "../../../../lib/VGA_ctrl/src/vga_backend.vhd" @@ -32,9 +30,10 @@ vhdl work "../../../../lib/VGA_ctrl/src/char_gen.vhd" vhdl work "../../../../lib/uart/uart_tx.vhd" vhdl work "../../../../lib/uart/uart_rx.vhd" vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd" -vhdl work "../../../../lib/FIFO/src/fifo_sync_dist.vhd" +vhdl work "../../../../lib/misc/async_types.vhd" vhdl work "../../../../lib/FIFO/src/fifo_async.vhd" vhdl work "../../../../lib/ac97_ctrl/src/core/ac_io.vhd" +vhdl work "../../src/async_defs.vhd" vhdl work "../../../../lib/VGA_ctrl/src/vga_frontend64.vhd" vhdl work "../../../../lib/uart/uart_wb.vhd" vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd" diff --git a/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj b/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj index ed6b674..dc20b75 100644 --- a/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj +++ b/projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj @@ -19,12 +19,10 @@ vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_cmd.vhd" vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\reset_virtex4.vhd" vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\ddr_phy_virtex4.vhd" vhdl work "W:\vhdl\lib\misc\dpram_2w2r_virtex4.vhd" -vhdl work "W:\vhdl\lib\misc\dpram_1w1r_dist.vhd" vhdl work "W:\vhdl\lib\FIFO\src\fifo_sync.vhd" vhdl work "W:\vhdl\lib\FIFO\src\async_fifo_ctrl.vhd" vhdl work "W:\vhdl\lib\ac97_ctrl\src\core\ac_out.vhd" vhdl work "W:\vhdl\lib\ac97_ctrl\src\core\ac_in.vhd" -vhdl work "W:\vhdl\projects\mips_sys\src\sys_types.vhd" vhdl work "W:\vhdl\projects\mips_sys\src\ram_ld.vhd" vhdl work "W:\vhdl\projects\mips_sys\src\bootloader.ROM_ld.vhd" vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_backend.vhd" @@ -32,9 +30,10 @@ vhdl work "W:\vhdl\lib\VGA_ctrl\src\char_gen.vhd" vhdl work "W:\vhdl\lib\uart\uart_tx.vhd" vhdl work "W:\vhdl\lib\uart\uart_rx.vhd" vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_top.vhd" -vhdl work "W:\vhdl\lib\FIFO\src\fifo_sync_dist.vhd" +vhdl work "W:\vhdl\lib\misc\async_types.vhd" vhdl work "W:\vhdl\lib\FIFO\src\fifo_async.vhd" vhdl work "W:\vhdl\lib\ac97_ctrl\src\core\ac_io.vhd" +vhdl work "W:\vhdl\projects\mips_sys\src\async_defs.vhd" vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_frontend64.vhd" vhdl work "W:\vhdl\lib\uart\uart_wb.vhd" vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_frontend64_wb.vhd"