diff --git a/lib/CPUs/JCpu/ghdl/.gitignore.templ b/lib/CPUs/JCpu/ghdl/.gitignore.templ index 907336a..d103ed5 100644 --- a/lib/CPUs/JCpu/ghdl/.gitignore.templ +++ b/lib/CPUs/JCpu/ghdl/.gitignore.templ @@ -1,4 +1,4 @@ .gitignore build/ -.gitignore -build/ +*.wopt + diff --git a/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.gtkw b/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.gtkw index b8506d1..729af6b 100644 --- a/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.gtkw +++ b/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.gtkw @@ -1,31 +1,26 @@ [*] [*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI -[*] Sat Jul 2 11:01:23 2022 +[*] Mon Sep 12 21:19:39 2022 [*] -[dumpfile] "/home/jens/work/projects/vhdl/lib/CPUs/JCpu/ghdl/build/tb_cpu_embedded/tb_cpu_embedded.fst" -[dumpfile_mtime] "Sat Jul 2 11:00:48 2022" -[dumpfile_size] 3297 +[dumpfile] "/home/jens/work/projects/vhdl/lib/CPUs/JCpu/ghdl/build/tb_cpu_embedded/tb_cpu_embedded.ghw" +[dumpfile_mtime] "Mon Sep 12 21:19:10 2022" +[dumpfile_size] 23396 [savefile] "/home/jens/work/projects/vhdl/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.gtkw" [timestart] 0 [size] 1854 1136 -[pos] -51 -51 +[pos] -1 -1 *-28.221537 367000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +[treeopen] top. +[treeopen] top.tb_cpu_embedded. +[treeopen] top.tb_cpu_embedded.uut. [sst_width] 233 [signals_width] 242 [sst_expanded] 1 [sst_vpaned_height] 330 @28 -uut.clk -uut.rst +top.tb_cpu_embedded.uut.clk @22 -uut.irom_addr[11:0] -uut.irom_data[17:0] -uut.xmem_addr[7:0] -uut.xmem_din[7:0] -uut.xmem_dout[7:0] -@28 -uut.xmem_we -@29 -uut.xmem_re +#{top.tb_cpu_embedded.uut.irom_data[17:0]} top.tb_cpu_embedded.uut.irom_data[17] top.tb_cpu_embedded.uut.irom_data[16] top.tb_cpu_embedded.uut.irom_data[15] top.tb_cpu_embedded.uut.irom_data[14] top.tb_cpu_embedded.uut.irom_data[13] top.tb_cpu_embedded.uut.irom_data[12] top.tb_cpu_embedded.uut.irom_data[11] top.tb_cpu_embedded.uut.irom_data[10] top.tb_cpu_embedded.uut.irom_data[9] top.tb_cpu_embedded.uut.irom_data[8] top.tb_cpu_embedded.uut.irom_data[7] top.tb_cpu_embedded.uut.irom_data[6] top.tb_cpu_embedded.uut.irom_data[5] top.tb_cpu_embedded.uut.irom_data[4] top.tb_cpu_embedded.uut.irom_data[3] top.tb_cpu_embedded.uut.irom_data[2] top.tb_cpu_embedded.uut.irom_data[1] top.tb_cpu_embedded.uut.irom_data[0] +#{top.tb_cpu_embedded.uut.irom_addr[11:0]} top.tb_cpu_embedded.uut.irom_addr[11] top.tb_cpu_embedded.uut.irom_addr[10] top.tb_cpu_embedded.uut.irom_addr[9] top.tb_cpu_embedded.uut.irom_addr[8] top.tb_cpu_embedded.uut.irom_addr[7] top.tb_cpu_embedded.uut.irom_addr[6] top.tb_cpu_embedded.uut.irom_addr[5] top.tb_cpu_embedded.uut.irom_addr[4] top.tb_cpu_embedded.uut.irom_addr[3] top.tb_cpu_embedded.uut.irom_addr[2] top.tb_cpu_embedded.uut.irom_addr[1] top.tb_cpu_embedded.uut.irom_addr[0] [pattern_trace] 1 [pattern_trace] 0 diff --git a/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.make b/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.make index ee12fa5..1e237d9 100644 --- a/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.make +++ b/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.make @@ -11,6 +11,7 @@ SRCS += ../src/tb_cpu_embedded.vhd # Compile TARGET := tb_cpu_embedded ENTITY := tb_cpu_embedded +WAVE_FORMAT := ghw include $(VHDL_MAKE_HOME)/ghdl.mk diff --git a/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.wopt.templ b/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.wopt.templ new file mode 100644 index 0000000..3933ff4 --- /dev/null +++ b/lib/CPUs/JCpu/ghdl/tb_cpu_embedded.wopt.templ @@ -0,0 +1,199 @@ +$ version 1.1 + +# Signals in packages : + +# Signals in entities : +/tb_cpu_embedded/rst +/tb_cpu_embedded/clk +/tb_cpu_embedded/ce +/tb_cpu_embedded/int_in +/tb_cpu_embedded/int_ack +/tb_cpu_embedded/xmem_din +/tb_cpu_embedded/xmem_dout +/tb_cpu_embedded/xmem_addr +/tb_cpu_embedded/xmem_we +/tb_cpu_embedded/xmem_re +/tb_cpu_embedded/io_sel +/tb_cpu_embedded/sram +/tb_cpu_embedded/uut/rst +/tb_cpu_embedded/uut/clk +/tb_cpu_embedded/uut/ce +/tb_cpu_embedded/uut/int_in +/tb_cpu_embedded/uut/int_ack +/tb_cpu_embedded/uut/xmem_we +/tb_cpu_embedded/uut/xmem_re +/tb_cpu_embedded/uut/xmem_din +/tb_cpu_embedded/uut/xmem_dout +/tb_cpu_embedded/uut/xmem_addr +/tb_cpu_embedded/uut/io_sel +/tb_cpu_embedded/uut/irom_data +/tb_cpu_embedded/uut/irom_addr +/tb_cpu_embedded/uut/inst_cpu/rst +/tb_cpu_embedded/uut/inst_cpu/clk +/tb_cpu_embedded/uut/inst_cpu/ce +/tb_cpu_embedded/uut/inst_cpu/int_in +/tb_cpu_embedded/uut/inst_cpu/int_ack +/tb_cpu_embedded/uut/inst_cpu/xmem_we +/tb_cpu_embedded/uut/inst_cpu/xmem_re +/tb_cpu_embedded/uut/inst_cpu/instr_din +/tb_cpu_embedded/uut/inst_cpu/instr_addr +/tb_cpu_embedded/uut/inst_cpu/xmem_din +/tb_cpu_embedded/uut/inst_cpu/xmem_dout +/tb_cpu_embedded/uut/inst_cpu/xmem_addr +/tb_cpu_embedded/uut/inst_cpu/io_sel +/tb_cpu_embedded/uut/inst_cpu/cpu_status +/tb_cpu_embedded/uut/inst_cpu/status_reg +/tb_cpu_embedded/uut/inst_cpu/ctrl +/tb_cpu_embedded/uut/inst_cpu/stk_out +/tb_cpu_embedded/uut/inst_cpu/stk_in +/tb_cpu_embedded/uut/inst_cpu/stk_reg +/tb_cpu_embedded/uut/inst_cpu/pc_in +/tb_cpu_embedded/uut/inst_cpu/pc_out +/tb_cpu_embedded/uut/inst_cpu/pc_next +/tb_cpu_embedded/uut/inst_cpu/idata +/tb_cpu_embedded/uut/inst_cpu/int_pc_addr +/tb_cpu_embedded/uut/inst_cpu/iphase +/tb_cpu_embedded/uut/inst_cpu/const_data +/tb_cpu_embedded/uut/inst_cpu/reg_a_dout +/tb_cpu_embedded/uut/inst_cpu/reg_b_dout +/tb_cpu_embedded/uut/inst_cpu/reg_din +/tb_cpu_embedded/uut/inst_cpu/alu_op1 +/tb_cpu_embedded/uut/inst_cpu/alu_op2 +/tb_cpu_embedded/uut/inst_cpu/alu_result +/tb_cpu_embedded/uut/inst_cpu/alu_status +/tb_cpu_embedded/uut/inst_cpu/pc_inc +/tb_cpu_embedded/uut/inst_cpu/pc_load +/tb_cpu_embedded/uut/inst_cpu/cpu_active +/tb_cpu_embedded/uut/inst_cpu/stk_we +/tb_cpu_embedded/uut/inst_cpu/cmem_we +/tb_cpu_embedded/uut/inst_cpu/creg_we +/tb_cpu_embedded/uut/inst_cpu/ctrl_inst +/tb_cpu_embedded/uut/inst_cpu/ctrl_iphase +/tb_cpu_embedded/uut/inst_cpu/was_pcld +/tb_cpu_embedded/uut/inst_cpu/was_pop2pc +/tb_cpu_embedded/uut/inst_cpu/int_pc_load +/tb_cpu_embedded/uut/inst_cpu/int_stk_push +/tb_cpu_embedded/uut/inst_cpu/int_stk_pop +/tb_cpu_embedded/uut/inst_cpu/stk_push +/tb_cpu_embedded/uut/inst_cpu/stk_pop +/tb_cpu_embedded/uut/inst_cpu/status_save +/tb_cpu_embedded/uut/inst_cpu/status_restore +/tb_cpu_embedded/uut/inst_cpu/creg_dout +/tb_cpu_embedded/uut/inst_cpu/cmem_din +/tb_cpu_embedded/uut/inst_cpu/cmem_dout +/tb_cpu_embedded/uut/inst_cpu/stk_addr +/tb_cpu_embedded/uut/inst_cpu/cmem_addr +/tb_cpu_embedded/uut/inst_cpu/stk_ptr +/tb_cpu_embedded/uut/inst_cpu/creg_ctrl_out +/tb_cpu_embedded/uut/inst_cpu/creg_ctrl_in +/tb_cpu_embedded/uut/inst_cpu/xio_sel +/tb_cpu_embedded/uut/inst_cpu/cio_sel +/tb_cpu_embedded/uut/inst_cpu/mem_data +/tb_cpu_embedded/uut/inst_cpu/mem_addr +/tb_cpu_embedded/uut/inst_cpu/inst_stack_ctrl/rst +/tb_cpu_embedded/uut/inst_cpu/inst_stack_ctrl/clk +/tb_cpu_embedded/uut/inst_cpu/inst_stack_ctrl/push +/tb_cpu_embedded/uut/inst_cpu/inst_stack_ctrl/pop +/tb_cpu_embedded/uut/inst_cpu/inst_stack_ctrl/ptr_out +/tb_cpu_embedded/uut/inst_cpu/inst_stack_ctrl/din +/tb_cpu_embedded/uut/inst_cpu/inst_stack_ctrl/dout +/tb_cpu_embedded/uut/inst_cpu/inst_stack_ctrl/mem_we +/tb_cpu_embedded/uut/inst_cpu/inst_stack_ctrl/ptr +/tb_cpu_embedded/uut/inst_cpu/inst_pc/rst +/tb_cpu_embedded/uut/inst_cpu/inst_pc/clk +/tb_cpu_embedded/uut/inst_cpu/inst_pc/inc +/tb_cpu_embedded/uut/inst_cpu/inst_pc/load +/tb_cpu_embedded/uut/inst_cpu/inst_pc/pc_in +/tb_cpu_embedded/uut/inst_cpu/inst_pc/pc_out +/tb_cpu_embedded/uut/inst_cpu/inst_pc/pc_next +/tb_cpu_embedded/uut/inst_cpu/inst_dpath_ctrl/inst_in +/tb_cpu_embedded/uut/inst_cpu/inst_dpath_ctrl/iphase_in +/tb_cpu_embedded/uut/inst_cpu/inst_dpath_ctrl/status_in +/tb_cpu_embedded/uut/inst_cpu/inst_dpath_ctrl/ctrl_out +/tb_cpu_embedded/uut/inst_cpu/inst_dpath_ctrl/idout +/tb_cpu_embedded/uut/inst_cpu/inst_dpath_ctrl/ddout +/tb_cpu_embedded/uut/inst_cpu/inst_dpath_ctrl/opcode +/tb_cpu_embedded/uut/inst_cpu/inst_dpath_ctrl/ctrl_lines +/tb_cpu_embedded/uut/inst_cpu/inst_dpath_ctrl/dbg_iname +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/rst +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/clk +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/ctrl_in +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/int_in +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/int_exit +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/iphase_in +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/pc_addr_out +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/int_ack_out +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/stat_save_out +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/stat_rest_out +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/pc_load_out +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/stk_push_out +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/stk_pop_out +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/int_state +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/int_state_next +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/pc_load +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/int_ack +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/stk_push +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/stk_pop +/tb_cpu_embedded/uut/inst_cpu/inst_int_ctrl/int_request +/tb_cpu_embedded/uut/inst_cpu/inst_reg_ab/clk +/tb_cpu_embedded/uut/inst_cpu/inst_reg_ab/we_a +/tb_cpu_embedded/uut/inst_cpu/inst_reg_ab/ptr_a +/tb_cpu_embedded/uut/inst_cpu/inst_reg_ab/ptr_b +/tb_cpu_embedded/uut/inst_cpu/inst_reg_ab/din_a +/tb_cpu_embedded/uut/inst_cpu/inst_reg_ab/dout_a +/tb_cpu_embedded/uut/inst_cpu/inst_reg_ab/dout_b +/tb_cpu_embedded/uut/inst_cpu/inst_reg_ab/addr_a +/tb_cpu_embedded/uut/inst_cpu/inst_reg_ab/addr_b +/tb_cpu_embedded/uut/inst_cpu/inst_reg_ab/mem +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/clka +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/clkb +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/en_a +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/en_b +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/we_a +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/we_b +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/addr_a +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/addr_b +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/din_a +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/din_b +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/dout_a +/tb_cpu_embedded/uut/inst_cpu/inst_chipram/dout_b +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/rst +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/clk +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/we +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/addr +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/din +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/dout +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/ctrl_in +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/ctrl_out +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/reg_bank_sel +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/reg_int_ctrl +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/reg_stk_high +/tb_cpu_embedded/uut/inst_cpu/inst_chipreg/reg_cmem_high +/tb_cpu_embedded/uut/inst_cpu/inst_alu/rst +/tb_cpu_embedded/uut/inst_cpu/inst_alu/clk +/tb_cpu_embedded/uut/inst_cpu/inst_alu/op_en +/tb_cpu_embedded/uut/inst_cpu/inst_alu/cy_in +/tb_cpu_embedded/uut/inst_cpu/inst_alu/op1_in +/tb_cpu_embedded/uut/inst_cpu/inst_alu/op2_in +/tb_cpu_embedded/uut/inst_cpu/inst_alu/opsel +/tb_cpu_embedded/uut/inst_cpu/inst_alu/res_out +/tb_cpu_embedded/uut/inst_cpu/inst_alu/stat_load +/tb_cpu_embedded/uut/inst_cpu/inst_alu/stat_in +/tb_cpu_embedded/uut/inst_cpu/inst_alu/stat_out +/tb_cpu_embedded/uut/inst_cpu/inst_alu/sum_cy +/tb_cpu_embedded/uut/inst_cpu/inst_alu/sh_cy +/tb_cpu_embedded/uut/inst_cpu/inst_alu/sum_cy_in +/tb_cpu_embedded/uut/inst_cpu/inst_alu/sh_cy_in +/tb_cpu_embedded/uut/inst_cpu/inst_alu/left_shift +/tb_cpu_embedded/uut/inst_cpu/inst_alu/add_subn +/tb_cpu_embedded/uut/inst_cpu/inst_alu/result +/tb_cpu_embedded/uut/inst_cpu/inst_alu/sum_res +/tb_cpu_embedded/uut/inst_cpu/inst_alu/lf_res +/tb_cpu_embedded/uut/inst_cpu/inst_alu/sh_res +/tb_cpu_embedded/uut/inst_cpu/inst_alu/res_reg +/tb_cpu_embedded/uut/inst_cpu/inst_alu/status +/tb_cpu_embedded/uut/inst_cpu/inst_alu/stat_reg +/tb_cpu_embedded/uut/inst_irom/clk +/tb_cpu_embedded/uut/inst_irom/ce +/tb_cpu_embedded/uut/inst_irom/addr +/tb_cpu_embedded/uut/inst_irom/dout