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- added AC-97 controller

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git-svn-id: http://moon:8086/svn/vhdl/trunk@132 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2008-11-01 21:47:15 +00:00
parent a41b5f572a
commit 755b318e7a
7 changed files with 188 additions and 38 deletions
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projects/mips_sys/src/mips_sys_sim.vhd
+67 -17
View File
@@ -104,7 +104,7 @@ PORT
sys_flash_ce : out std_logic;
sys_flash_ssram_we_n : out std_logic;
sys_flash_ssram_oe_n : out std_logic;
sys_flash_rstn : out std_logic;
sys_flash_ac97_rstn : out std_logic;
sys_flash_byten : out std_logic;
sys_ssram_clk : out std_logic;
@@ -116,7 +116,12 @@ PORT
sys_ssram_adv : out std_logic;
sys_ssram_mode : out std_logic;
sys_ssram_zz : out std_logic;
sys_ac97_sdata_in : in std_logic;
sys_ac97_bit_clk : in std_logic;
sys_ac97_sdata_out : out std_logic;
sys_ac97_ssync : out std_logic;
sys_error : out unsigned(1 downto 0) -- indicates Errors
);
@@ -362,6 +367,8 @@ ARCHITECTURE behavior OF mips_sys IS
signal rst_in : std_logic;
signal int_uart_rx : std_logic;
signal locked : std_logic;
signal ac97_rstn : std_logic;
signal flash_rstn : std_logic;
signal ADDR_I_usb : unsigned(31 downto 0);
signal ADDR_I_flash : unsigned(31 downto 0);
signal ADDR_I_ssram : unsigned(31 downto 0);
@@ -469,6 +476,12 @@ ARCHITECTURE behavior OF mips_sys IS
signal SRDY_O_ssram : std_logic;
signal SDAT_O_ssram : unsigned(31 downto 0);
signal INT_O_ac97 : std_logic;
signal CYC_I_ac97 : std_logic;
signal ACK_O_ac97 : std_logic;
signal SRDY_O_ac97 : std_logic;
signal SDAT_O_ac97 : unsigned(31 downto 0);
signal gpo0 : unsigned(31 downto 0);
signal gpo1 : unsigned(31 downto 0);
signal gpi0 : unsigned(31 downto 0);
@@ -486,7 +499,7 @@ ARCHITECTURE behavior OF mips_sys IS
-- attribute rom_style of cpu_cpu_write_fifo_dout: signal is "DISTRIBUTED";
-- attribute rom_style of cpu_read_fifo_dout: signal is "DISTRIBUTED";
type mem_area_t is (mem_dead, mem_flash, mem_ssram, mem_usb, mem_rom, mem_ram, mem_gpio, mem_uart, mem_sdram, mem_vga);
type mem_area_t is (mem_dead, mem_flash, mem_ssram, mem_usb, mem_rom, mem_ram, mem_gpio, mem_uart, mem_sdram, mem_vga, mem_ac97);
signal mem_area : mem_area_t;
BEGIN
@@ -505,7 +518,8 @@ BEGIN
SDAT_I_sdram <= MDAT_O & MDAT_O;
SEL_I_sdram <= "0000" & SEL_O;
sys_flash_ac97_rstn <= ac97_rstn and flash_rstn;
sys_flash_ssram_out:
process(clk)
@@ -575,7 +589,7 @@ int_sample:
process(clk)
begin
if rising_edge(clk) then
int <= "000" & sys_usb_int & int_uart_rx & sys_btn(4);
int <= "00" & INT_O_ac97 & sys_usb_int & int_uart_rx & sys_btn(4);
end if;
end process;
@@ -587,15 +601,17 @@ mem_mux:
mem_area <= mem_flash;
elsif ADDR_O(31 downto 28) = X"A" then
if ADDR_O(27 downto 26) = "00" then
if ADDR_O(17 downto 16) = "00" then
mem_area <= mem_gpio;
elsif ADDR_O(17 downto 16) = "01" then
mem_area <= mem_uart;
elsif ADDR_O(17 downto 16) = "10" then
mem_area <= mem_usb;
elsif ADDR_O(17 downto 16) = "11" then
mem_area <= mem_vga;
end if;
if ADDR_O(18 downto 16) = "000" then
mem_area <= mem_gpio;
elsif ADDR_O(18 downto 16) = "001" then
mem_area <= mem_uart;
elsif ADDR_O(18 downto 16) = "010" then
mem_area <= mem_usb;
elsif ADDR_O(18 downto 16) = "011" then
mem_area <= mem_vga;
elsif ADDR_O(18 downto 16) = "100" then
mem_area <= mem_ac97;
end if;
elsif ADDR_O(27 downto 26) = "01" then
mem_area <= mem_flash;
elsif ADDR_O(27 downto 26) = "10" then
@@ -624,6 +640,7 @@ signal_mux:
CYC_I_sdram <= '0';
CYC_I_vga <= '0';
CYC_I_ssram <= '0';
CYC_I_ac97 <= '0';
case mem_area is
@@ -651,6 +668,9 @@ signal_mux:
when mem_vga =>
CYC_I_vga <= CYC_O;
when mem_ac97 =>
CYC_I_ac97 <= CYC_O;
when mem_ssram =>
CYC_I_ssram <= CYC_O;
@@ -661,8 +681,8 @@ signal_mux:
end process;
------------------------------------------------------------------
SRDY_I <= SRDY_O_flash or SRDY_O_ssram or SRDY_O_usb or SRDY_O_sdram or SRDY_O_ram or SRDY_O_rom or SRDY_O_uart or SRDY_O_gpio or SRDY_O_vga;
ACK_I <= ACK_O_flash or ACK_O_usb or ACK_O_sdram or ACK_O_ssram or ACK_O_ram or ACK_O_rom or ACK_O_uart or ACK_O_gpio or ACK_O_vga;
SRDY_I <= SRDY_O_flash or SRDY_O_ssram or SRDY_O_usb or SRDY_O_sdram or SRDY_O_ram or SRDY_O_rom or SRDY_O_uart or SRDY_O_gpio or SRDY_O_vga or SRDY_O_ac97;
ACK_I <= ACK_O_flash or ACK_O_usb or ACK_O_sdram or ACK_O_ssram or ACK_O_ram or ACK_O_rom or ACK_O_uart or ACK_O_gpio or ACK_O_vga or ACK_O_ac97;
MDAT_I <= SDAT_O_ssram when CYC_I_ssram = '1' else
SDAT_O_sdram(31 downto 0) when CYC_I_sdram = '1' else
SDAT_O_ram when CYC_I_ram = '1' else
@@ -671,6 +691,7 @@ signal_mux:
SDAT_O_usb when CYC_I_usb = '1' else
SDAT_O_uart when CYC_I_uart = '1' else
SDAT_O_vga when CYC_I_vga = '1' else
SDAT_O_ac97 when CYC_I_ac97 = '1' else
SDAT_O_gpio when CYC_I_gpio = '1' else X"DEADBEEF";
------------------------------------------------------------------
@@ -790,7 +811,7 @@ inst_flash_port : flash_port_wb
port_wr => flash_we_n,
port_rd => flash_oe_n,
flash_cs => sys_flash_ce,
flash_rst => sys_flash_rstn
flash_rst => flash_rstn
);
inst_usb_port : async_port_wb
@@ -996,5 +1017,34 @@ inst_vga_frontend : vga_frontend64
vga_vsync => sys_vga_vsync
);
inst_ac97_wb : entity work.ac97_wb
GENERIC MAP
(
fifo_depth => 4
)
PORT MAP
(
-- J-Bus domain
CLK_I => clk,
RST_I => rst,
CYC_I => CYC_I_ac97,
STB_I => STB_O,
WE_I => WE_O,
ACK_O => ACK_O_ac97,
SRDY_O => SRDY_O_ac97,
MRDY_I => MRDY_O,
ADDR_I => ADDR_O,
DAT_I => MDAT_O,
DAT_O => SDAT_O_ac97,
INT_O => INT_O_ac97,
-- AC97 domain
ac97_sdata_in => sys_ac97_sdata_in,
ac97_bit_clk => sys_ac97_bit_clk,
ac97_reset_n => ac97_rstn,
ac97_sdata_out => sys_ac97_sdata_out,
ac97_ssync => sys_ac97_ssync
);
------------------------------------------------------------------
END;