git-svn-id: http://moon:8086/svn/vhdl/trunk@1423 cc03376c-175c-47c8-b038-4cd826a8556b
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2021-03-21 11:31:55 +00:00
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#!/bin/sh
# ----------------------------------------------------------------------
# Project: JCPU, a portable 8-bit RISC CPU written in VHDL
# This file: rom-file generation for cpu_core
# Copyright (C) 2007 J. Ahrensfeld
# This library is free software; you can redistribute it and/or
# modify it under the terms of the GNU Lesser General Public
# License as published by the Free Software Foundation; either
# version 2.1 of the License, or (at your option) any later version.
# This library is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
# Lesser General Public License for more details.
# You should have received a copy of the GNU Lesser General Public
# License along with this library; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
# For questions and ideas, please contact the author at jens@jayfield.org
# ---------------------------------------------------------------------
TARGET=$2
DSTDIR=$1
JASM_HOME=/cygdrive/w/vhdl/lib/CPUs/JCpu/tools
$JASM_HOME/jasm.rb $TARGET.jsm
irom_tcl_snippet="$TARGET.irom.tcl.snip"
irom_vhdl_snippet="$TARGET.irom.vhdl.snip"
irom_ld_vhdl_snippet="$TARGET.irom_ld.vhdl.snip"
xrom_tcl_snippet="$TARGET.xrom.tcl.snip"
xrom_vhdl_snippet="$TARGET.xrom.vhdl.snip"
xrom_ld_vhdl_snippet="$TARGET.xrom_ld.vhdl.snip"
$JASM_HOME/insrom.rb $irom_vhdl_snippet $JASM_HOME/irom.vhd.tpl >$DSTDIR/$TARGET\_irom.vhdl
$JASM_HOME/insrom.rb $irom_ld_vhdl_snippet $JASM_HOME/irom_ld.vhd.tpl >$DSTDIR/$TARGET\_irom_ld.vhdl
$JASM_HOME/insrom.rb $xrom_vhdl_snippet $JASM_HOME/xrom.vhd.tpl >$DSTDIR/$TARGET\_xrom.vhdl
$JASM_HOME/insrom.rb $xrom_ld_vhdl_snippet $JASM_HOME/xrom_ld.vhd.tpl >$DSTDIR/$TARGET\_xrom_ld.vhdl
cat $irom_tcl_snippet > $TARGET.tcl.snip.snip
cat $xrom_tcl_snippet >> $TARGET.tcl.snip.snip
$JASM_HOME/insrom.rb $TARGET.tcl.snip.snip $JASM_HOME/rom.tcl.tpl >$TARGET.tcl
rm -f *.snip
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; -------------------------------------------------
; Constants
; -------------------------------------------------
include "../../../lib/jasm/cregs.inc.jsm"
; XIO registers
reg_led: equ 0x00 ; R/W
reg_pcmmode: equ 0x01 ; R/W
reg_encrypt_src: equ 0x02 ; R/W
reg_cmd_addr: equ 0x04 ; WO
reg_cmd_data: equ 0x06 ; WO
lcd_port: equ 0x08 ; R/W
reg_pcmin_dc_adj_left: equ 0x0D ; R/W
reg_pcmin_dc_adj_right: equ 0x0F ; R/W
reg_encrypt_const0: equ 0x11 ; R/W
reg_encrypt_const1: equ 0x12 ; R/W
reg_encrypt_const2: equ 0x13 ; R/W
reg_encrypt_const3: equ 0x14 ; R/W
reg_stat_addr: equ 0x04 ; RO
reg_stat_data: equ 0x06 ; RO
reg_btn: equ 0x80 ; RO
reg_dip: equ 0x81 ; RO
reg_pcm_left: equ 0x82 ; RO
reg_pcm_right: equ 0x84 ; RO
reg_stat_hw: equ 0xA0 ; RO
reg_beef: equ 0x8E
; reg_stat_hw
; Bits
omsk_ac_rdy: equ 0x01
omsk_cmd_rdy: equ 0x02
omsk_stat_rdy: equ 0x04
; Flag masks
omsk_led0: equ 0x01
omsk_led1: equ 0x02
omsk_led2: equ 0x04
omsk_led3: equ 0x08
amsk_led0: equ 0xFE
amsk_led1: equ 0xFD
amsk_led2: equ 0xFB
amsk_led3: equ 0xF7
omsk_btn_W: equ 0x01
omsk_btn_N: equ 0x02
omsk_btn_E: equ 0x04
omsk_btn_S: equ 0x08
omsk_btn_C: equ 0x10
DC_CORR_PCM: equ 0xFF40
COUNT_RELOAD: equ 0x0200
BTN_BOUNCE_RELOAD: equ 0x0400
; -------------------------------------------------
; On-Chip memory
; -------------------------------------------------
cmem 0
stat_addr: db 2
stat_data: db 2
count: db 2
btn_bounce_cnt: db 2
btn_state: db 1
btn_last: db 1
audio_vol: db 1
cipher_vol: db 1
vol_was_set: db 1
xmem
msg_dsi: dc "DSI GmbH Bremen ", 0
msg_dsi2: dc "October 2007 ", 0
msg_byp1: dc " Encryption ", 0
msg_byp2: dc " Bypass ", 0
msg_ecb: dc "ECB-128 encrypt.", 0
msg_cbc: dc "CBC-128 encrypt.", 0
msg_audio: dc " Audio data ", 0
msg_incdata: dc " Increm. blocks ", 0
msg_setvol: dc "Volume : ", 0
msg_blank16: dc " ", 0
ac97_cfg_addr: dc 0x00, 0x2A ; W: Extended Audio CTRL/STATUS
dc 0x00, 0x1A ; W: Record select
dc 0x00, 0x1C ; W: Record gain
dc 0x00, 0x2C ; W: PCM DAC rate
dc 0x00, 0x32 ; W: PCM ADC rate
dc 0x00, 0x20 ; W: General purpose
dc 0x00, 0x02 ; W: Master volume
dc 0x00, 0x04 ; W: Headphone volume
dc 0x00, 0x18 ; W: PCM volume
ac97_cfg_data: dc 0x01, 0x00 ; W: VRA=1
dc 0x04, 0x04 ; W: Record source = LINE_IN
dc 0x00, 0x00 ; W: Record gain = 0dB
dc 0x80, 0xBB ; W: DAC rate 8000Hz
dc 0x80, 0xBB ; W: ADC rate 8000Hz
; dc 0x80, 0xBB ; W: DAC rate 48000Hz
; dc 0x80, 0xBB ; W: ADC rate 48000Hz
dc 0x00, 0x80 ; W: POP=1
dc 0x00, 0x00 ; W: Master volume = 0dB
dc 0x00, 0x80 ; W: Headphone volume = 0dB, muted
dc 0x0A, 0x0A ; W: PCM volume = -3dB
; -------------------------------------------------
; Program
; -------------------------------------------------
code
org 0x000
reset: jmp init
org 0x001
jmp frame_isr
; -------------------------------------------------
; Main
; -------------------------------------------------
init: mov R0, COUNT_RELOAD'low
mov R1, COUNT_RELOAD'high
movc (count+0), R0
movc (count+1), R1
mov R0, 0x00
xout (reg_led), R0
mov R0, 0xFF
xout (reg_encrypt_const0), R0
mov R0, 0x3b
xout (reg_encrypt_const1), R0
mov R0, 0x9c
xout (reg_encrypt_const2), R0
mov R0, 0x01
xout (reg_encrypt_const3), R0
mov R0, 0x00
movc (btn_state), R0
movc (btn_last), R0
mov R0, BTN_BOUNCE_RELOAD'low
movc (btn_bounce_cnt+0), R0
mov R0, BTN_BOUNCE_RELOAD'high
movc (btn_bounce_cnt+1), R0
mov R0, 0x0A
movc (audio_vol), R0
mov R0, 0x0C
movc (cipher_vol), R0
call LCD_init
; Print Hello world
mov R0, LCD_CMD_CLEAR
call LCD_writecmd
mov R1, msg_dsi
call LCD_putsx
mov R0, LCD_CMD_Z2
call LCD_writecmd
mov R1, msg_dsi2
call LCD_putsx
call delay1s
wait_ac_rdy: xin R0, (reg_stat_hw)
and R0, omsk_ac_rdy
jz wait_ac_rdy
; Send AC97 Status register read-request (CODEC_ID)
mov R0, 0x00 ; Addr(LSW)
mov R1, 0x80 ; Addr(MSW)
mov R2, 0x00 ; Data(LSW)
mov R3, 0x00 ; Data(MSW)
call AC_status_io
movc (stat_addr+0), R0
movc (stat_addr+1), R1
movc (stat_data+0), R2
movc (stat_data+1), R3
; Initialize AC97
; check status
ac97_rdy_lp: mov R0, 0x00
mov R1, 0xA6
mov R2, 0x00
mov R3, 0x00
call AC_status_io
and R2, 0x0F
cmp R2, 0x0F
jne ac97_rdy_lp
mov R15, 9
mov R7, ac97_cfg_addr
mov R8, ac97_cfg_data
ac97_init_lp: movx R0, (R7)
inc R7
movx R1, (R7)
inc R7
movx R2, (R8)
inc R8
movx R3, (R8)
inc R8
call AC_status_io
dec R15
jnz ac97_init_lp
; Set PCM mode
call set_pcm_byp
; PCM-IN: Set DC correction LEFT
mov R0, DC_CORR_PCM'high
xout (reg_pcmin_dc_adj_left+1), R0
mov R0, DC_CORR_PCM'low
xout (reg_pcmin_dc_adj_left+0), R0
; PCM-IN: Set DC correction RIGHT
mov R0, DC_CORR_PCM'high
xout (reg_pcmin_dc_adj_right+1), R0
mov R0, DC_CORR_PCM'low
xout (reg_pcmin_dc_adj_right+0), R0
; Enable Interrupt
mov R0, 0x07
cout (cpu_int_ctrl), R0
; -----------------------------------------------------
; Check buttons
; -----------------------------------------------------
main: movc R0, (btn_state)
tst R0
jnz chk_vol
mov R1, 0
movc (vol_was_set), R1
chk_vol: and R0, 0x10
jz chk_ecb
movc R0, (btn_state)
cmp R0, 0x14
jeq incvol
cmp R0, 0x11
jeq decvol
movc R1, (vol_was_set)
tst R1
jnz main
call set_pcm_byp
jmp main
incvol: movc R0, (audio_vol)
cmp R0, 0x00
jeq main
dec R0
movc (audio_vol), R0
call set_audio_vol
mov R0, LCD_CMD_Z1
call LCD_writecmd
mov R1, msg_blank16
call LCD_putsx
mov R0, LCD_CMD_Z1
call LCD_writecmd
mov R1, msg_setvol
call LCD_putsx
mov R0, 0x1F
movc R1, (audio_vol)
sub R0, R1
call PutHexByte
call delay100ms
call delay100ms
mov R0, 1
movc (vol_was_set), R0
jmp main
decvol: movc R0, (audio_vol)
cmp R0, 0x1F
jeq main
inc R0
movc (audio_vol), R0
call set_pcm_byp
mov R0, LCD_CMD_Z1
call LCD_writecmd
mov R1, msg_blank16
call LCD_putsx
mov R0, LCD_CMD_Z1
call LCD_writecmd
mov R1, msg_setvol
call LCD_putsx
mov R0, 0x1F
movc R1, (audio_vol)
sub R0, R1
call PutHexByte
call delay100ms
call delay100ms
mov R0, 1
movc (vol_was_set), R0
jmp main
chk_ecb: movc R0, (btn_state)
and R0, 0x09
jz chk_cbc
mov R1, 0x01
and R0, 0x01
jne ecb_set_now
mov R1, 0x00
ecb_set_now: xout (reg_encrypt_src), R1
call set_pcm_ecb
jmp main
chk_cbc: movc R0, (btn_state)
and R0, 0x06
jz ex_chk
mov R1, 0x01
and R0, 0x04
jne cbc_set_now
mov R1, 0x00
cbc_set_now: xout (reg_encrypt_src), R1
call set_pcm_cbc
ex_chk: jmp main
; -----------------------------------------------------
set_pcm_byp: ; Set PCM mode
mov R0, 0x00
xout (reg_pcmmode), R0
; Switch on LED
mov R0, 0x06
xout (reg_led), R0
call set_audio_vol
; Set LCD text
mov R0, LCD_CMD_Z1
call LCD_writecmd
mov R1, msg_byp1
call LCD_putsx
mov R0, LCD_CMD_Z2
call LCD_writecmd
mov R1, msg_byp2
call LCD_putsx
ret
set_pcm_ecb: ; Set PCM mode
mov R0, 0x01
xout (reg_pcmmode), R0
; Switch on LED
mov R0, 0x08
xout (reg_led), R0
call set_cipher_vol
; Set LCD text
mov R0, LCD_CMD_Z1
call LCD_writecmd
mov R1, msg_ecb
call LCD_putsx
mov R1, msg_audio
xin R0, (reg_encrypt_src)
and R0, 0x01
jnz ecb_print
mov R1, msg_incdata
ecb_print: mov R0, LCD_CMD_Z2
call LCD_writecmd
call LCD_putsx
ret
set_pcm_cbc: ; Set PCM mode
mov R0, 0x02
xout (reg_pcmmode), R0
; Switch on LED
mov R0, 0x01
xout (reg_led), R0
call set_cipher_vol
; Set LCD text
mov R0, LCD_CMD_Z1
call LCD_writecmd
mov R1, msg_cbc
call LCD_putsx
xin R0, (reg_encrypt_src)
and R0, 0x01
jnz cbc_print
mov R1, msg_incdata
cbc_print: mov R0, LCD_CMD_Z2
call LCD_writecmd
call LCD_putsx
ret
; -------------------------------------------------
set_audio_vol:
; Set PCM volume
mov R0, 0x00 ; Addr(LSW)
mov R1, 0x18 ; Addr(MSW)
movc R2, (audio_vol) ; Data(LSW)
movc R3, (audio_vol) ; Data(MSW)
call AC_status_io
movc (stat_addr+0), R0
movc (stat_addr+1), R1
movc (stat_data+0), R2
movc (stat_data+1), R3
ret
; -------------------------------------------------
set_cipher_vol:
; Set PCM volume
mov R0, 0x00 ; Addr(LSW)
mov R1, 0x18 ; Addr(MSW)
movc R2, (cipher_vol) ; Data(LSW)
movc R3, (cipher_vol) ; Data(MSW)
call AC_status_io
movc (stat_addr+0), R0
movc (stat_addr+1), R1
movc (stat_data+0), R2
movc (stat_data+1), R3
ret
; -------------------------------------------------
frame_isr: push R0
push R1
push R2
push R3
movc R0, (count+0)
movc R1, (count+1)
dec R0
subc R1, 0
movc (count+0), R0
movc (count+1), R1
tst R1
jnz ex_fisr
tst R0
jnz ex_fisr
mov R0, COUNT_RELOAD'low
mov R1, COUNT_RELOAD'high
movc (count+0), R0
movc (count+1), R1
xin R0, (reg_encrypt_const0)
xin R1, (reg_encrypt_const1)
xin R2, (reg_encrypt_const2)
xin R3, (reg_encrypt_const3)
inc R0
addc R1, 0
addc R2, 0
addc R3, 0
xout (reg_encrypt_const0), R0
xout (reg_encrypt_const1), R1
xout (reg_encrypt_const2), R2
xout (reg_encrypt_const3), R3
;Sample switches and buttons
ex_fisr: xin R0, (reg_btn)
movc R1, (btn_bounce_cnt+1)
movc R2, (btn_bounce_cnt+0)
tst R1
jnz dec_bounce
tst R2
jz btn_is_valid
dec_bounce: dec R2
subc R1, 0
movc (btn_bounce_cnt+1), R1
movc (btn_bounce_cnt+0), R2
movc R1, (btn_last)
xin R0, (reg_btn)
movc (btn_last), R0
cmp R0, R1
jeq exit_isr
jmp bounce_wait
btn_is_valid: movc (btn_state), R0
bounce_wait: mov R1, BTN_BOUNCE_RELOAD'high
movc (btn_bounce_cnt+1), R1
mov R1, BTN_BOUNCE_RELOAD'low
movc (btn_bounce_cnt+0), R1
exit_isr: pop R3
pop R2
pop R1
pop R0
reti
; -------------------------------------------------
; AC Read/Write register
; R0 : IN/OUT AC register address 7..0. Written, if cmd was READ (i.e. address[15] = 1)
; R1 : IN/OUT AC register address 15..8. Written, if cmd was READ (i.e. address[15] = 1)
; R2 : IN/OUT AC register data 7..0. Written, if cmd was READ (i.e. address[15] = 1)
; R3 : IN/OUT AC register data 15..8. Written, if cmd was READ (i.e. address[15] = 1)
AC_status_io: call wait_cmd_rdy
xout (reg_cmd_addr+1), R1
xout (reg_cmd_addr+0), R0
xout (reg_cmd_data+1), R3
xout (reg_cmd_data+0), R2
; Check if command was read
and R1, 0x80
jnz wait_read
ret
; Wait for READ command being processed
wait_read: call wait_stat_rdy
; Read AC97 Status register address
xin R1, (reg_stat_addr+1)
xin R0, (reg_stat_addr+0)
; Read AC97 Status register data
xin R3, (reg_stat_data+1)
xin R2, (reg_stat_data+0)
ret
; -------------------------------------------------
wait_cmd_rdy: push R0
wcr_loop: xin R0, (reg_stat_hw)
and R0, omsk_cmd_rdy
jz wcr_loop
pop R0
ret
; -------------------------------------------------
wait_stat_rdy: push R0
wsr_loop: xin R0, (reg_stat_hw)
and R0, omsk_stat_rdy
jz wsr_loop
pop R0
ret
; -------------------------------------------------
; PutHexByte
; R0 : Byte value
PutHexByte: call bin2hex
call LCD_writechar
mov R0, R1
call LCD_writechar
ret
include "../../../lib/jasm/delays.inc.jsm"
include "../../../lib/jasm/lcd.inc.jsm"
include "../../../lib/jasm/utils.inc.jsm"
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