From 736cf3464dc116c0e0d40eed096ac10923e8121b Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Mon, 29 Mar 2021 08:39:24 +0000 Subject: [PATCH] - fixed git-svn-id: http://moon:8086/svn/vhdl/trunk@1565 cc03376c-175c-47c8-b038-4cd826a8556b --- projects/vga_ctrl/ghdl/tb_vga_ctrl.gtkw | 60 +++++++++++++++++++++++++ projects/vga_ctrl/ghdl/tb_vga_ctrl.make | 2 +- 2 files changed, 61 insertions(+), 1 deletion(-) diff --git a/projects/vga_ctrl/ghdl/tb_vga_ctrl.gtkw b/projects/vga_ctrl/ghdl/tb_vga_ctrl.gtkw index e69de29..b78e85c 100644 --- a/projects/vga_ctrl/ghdl/tb_vga_ctrl.gtkw +++ b/projects/vga_ctrl/ghdl/tb_vga_ctrl.gtkw @@ -0,0 +1,60 @@ +[*] +[*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI +[*] Mon Mar 29 08:37:38 2021 +[*] +[dumpfile] "/home/jens/work/vhdl/trunk/projects/vga_ctrl/ghdl/build/tb_vga_ctrl/tb_vga_ctrl.fst" +[dumpfile_mtime] "Mon Mar 29 08:33:31 2021" +[dumpfile_size] 14527 +[savefile] "/home/jens/work/vhdl/trunk/projects/vga_ctrl/ghdl/build/tb_vga_ctrl/tb_vga_ctrl.gtkw" +[timestart] 0 +[size] 1856 1136 +[pos] -2 -2 +*-38.647770 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +[sst_width] 317 +[signals_width] 328 +[sst_expanded] 1 +[sst_vpaned_height] 331 +@22 +uut.cpu_addr[7:0] +uut.cpu_blue[7:0] +uut.cpu_green[7:0] +uut.cpu_red[7:0] +uut.cpu_din[7:0] +@28 +uut.scan_rdy +uut.scan_rdy_h +uut.scan_rdy_v +uut.src_pos_x +uut.src_pos_y +uut.stat_hpos +uut.stat_hready +uut.stat_hscan +uut.stat_hsync +uut.stat_scan +uut.stat_vga_rdy +uut.stat_vpos +uut.stat_vready +uut.stat_vscan +uut.stat_vsync +uut.sys_clk_in +uut.sys_rst_in +uut.sys_vga_clk_ce +uut.sys_vga_clk_in +uut.sys_vga_clk_out +uut.cg_en +uut.cg_draw +uut.cg_posx_we +uut.cg_posy_we +uut.cg_rdy +uut.cg_ascii_we +uut.cg_clr_line +uut.cg_clr_screen +uut.cg_csr_pos_x +uut.cg_csr_pos_y +@22 +uut.sys_btn[4:0] +uut.sys_dip[7:0] +@23 +uut.sys_led[8:0] +[pattern_trace] 1 +[pattern_trace] 0 diff --git a/projects/vga_ctrl/ghdl/tb_vga_ctrl.make b/projects/vga_ctrl/ghdl/tb_vga_ctrl.make index b244799..370a3c0 100644 --- a/projects/vga_ctrl/ghdl/tb_vga_ctrl.make +++ b/projects/vga_ctrl/ghdl/tb_vga_ctrl.make @@ -19,7 +19,7 @@ SRCS += ../src/tb_vga_ctrl.vhd # Compile TARGET := tb_vga_ctrl ENTITY := tb_vga_ctrl -RUN_TIME := 1us +RUN_TIME := 2500us include $(VHDL_HOME)/make/ghdl.mk # -----------------------------------------------------------