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- commit local changes after CVS2SVN

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git-svn-id: http://moon:8086/svn/vhdl/trunk@1036 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2014-07-20 13:30:14 +00:00
parent 175cf3a4f4
commit 70e48af3ab
58 changed files with 9720 additions and 9650 deletions
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projects/mips_sys/sim/tb_mips_sys.fdo
+1 -1
View File
@@ -37,7 +37,7 @@ vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_dcache.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_icache.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_biu.vhd"
vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_top.vhd"
vcom -explicit -93 "../src/bootloader.ROM.vhd"
vcom -explicit -93 "../src/bootloader_flash.ROM.vhd"
vcom -explicit -93 "../../../lib/misc/rom_wb.vhd"
# VGA
projects/mips_sys/src/tb_mips_sys.vhd
+6 -2
View File
@@ -42,6 +42,8 @@ ARCHITECTURE behavior OF tb_mips_sys IS
constant AC97_CLK_PERIOD : time := 83 ns;
constant ETH_CLK_PERIOD : time := 7.7 ns;
constant LOOP_BACK_EN : std_logic := '1';
constant WITH_TLB : boolean := true;
constant KSEG_01_TRANSLATED : boolean := true;
signal sys_rst_n_in : std_logic := '0';
signal sys_clk_in : std_logic := '1';
signal dip : unsigned(7 downto 0) := (others => '0');
@@ -146,7 +148,9 @@ uut: entity work.mips_sys
GENERIC MAP
(
sys_freq_in => 100.000,
cpu_freq => 100.000,
cpu_freq => 60.000,
WITH_TLB => WITH_TLB,
TRANSLATE_KSEG0_1 => KSEG_01_TRANSLATED,
sdram_phaseshift => 0,
tsvga => ts_vga_800_600_72
)
@@ -365,7 +369,7 @@ ac97_clk_gen : PROCESS
FLASH_READ: process(sys_rst_n_in, sys_flash_ce, sys_flash_ssram_oe_n, sys_flash_ssram_a)
type file_t is file of integer;
file load_flash : file_t open read_mode is "blittertest_tb.elf.flash.bin";
file load_flash : file_t open read_mode is "test_dcache_sim.elf.flash.bin";
variable instr : integer;
variable index : natural;
variable temp : signed(31 downto 0);