- commit local changes after CVS2SVN
git-svn-id: http://moon:8086/svn/vhdl/trunk@1036 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
+86
-86
@@ -1,86 +1,86 @@
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---- $Id: CHANGES,v 1.1 2008-08-23 08:20:28 Jens Exp $
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----
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---- PCK_FIO: a VHDL package for C-style formatted file output
|
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---- Copyright (C) 1995, 2001 Easics NV
|
||||
----
|
||||
---- This library is free software; you can redistribute it and/or
|
||||
---- modify it under the terms of the GNU Lesser General Public
|
||||
---- License as published by the Free Software Foundation; either
|
||||
---- version 2.1 of the License, or (at your option) any later version.
|
||||
----
|
||||
---- This library is distributed in the hope that it will be useful,
|
||||
---- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
---- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
---- Lesser General Public License for more details.
|
||||
----
|
||||
---- You should have received a copy of the GNU Lesser General Public
|
||||
---- License along with this library; if not, write to the Free Software
|
||||
---- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
----
|
||||
---- For suggestions, bug reports, enhancement requests, and info about
|
||||
---- our design services, you can contact us at the following address:
|
||||
---- http://www.easics.com
|
||||
---- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium
|
||||
---- tel.: +32 16 395 600 fax : +32 16 395 619
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||||
---- e-mail: jand@easics.be (Jan Decaluwe)
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----
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Changes from version 1.16 to version 2002.07
|
||||
============================================
|
||||
|
||||
PCK_FIO is now distributed under the GNU Lesser General Public Licencse
|
||||
instead of the ordinary GPL, to better reflect intended usage.
|
||||
|
||||
Cosmetic changes in source code to correct some typos in the testbench output.
|
||||
A new testbench is also supplied.
|
||||
|
||||
The package now uses IEEE.numeric_std as default.
|
||||
|
||||
URL http://www.easics.com has been made part of address.
|
||||
|
||||
Changed syntax in the PCK_FIO package and its testbench to support VHDL-1993.
|
||||
Because of backwards-incompatibility, it has been necessary to supply
|
||||
different sets of files for 1987 and 1993.
|
||||
|
||||
Split the packages into a separate file for the header and a
|
||||
separate file for the body (in compliance with Easics' guidelines).
|
||||
|
||||
These changes resulted in the files:
|
||||
|
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Files for VHDL-1993:
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||||
--------------------
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||||
PCK_FIO_1993.vhd : the source code of the header file for the package
|
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PCK_FIO_1993_BODY.vhd: the source code of the body of the package
|
||||
TB_PCK_FIO_1993.vhd: the testbench for the package
|
||||
|
||||
Files for VHDL-1987:
|
||||
--------------------
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||||
PCK_FIO_1987.vhd: the source code of the header file for the package
|
||||
PCK_FIO_1987_BODY.vhd: the source code of the body of the package
|
||||
TB_PCK_FIO_1987.vhd: the testbench for the package
|
||||
|
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Updated README and PCK_FIO.html to support these changes.
|
||||
|
||||
Adapted package files to support NUL termination of strings.
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fo(Arg: string) now prints the string until the first NUL.
|
||||
Several examples of its use are demonstrated in the supplied testbenches.
|
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|
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Made cosmetic changes to code to improve readability.
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|
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Acknowledgment
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--------------
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These changes have been implemented by Peter Geens.
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---- $Id: CHANGES,v 1.1 2008/08/23 08:20:28 Jens Exp $
|
||||
----
|
||||
---- PCK_FIO: a VHDL package for C-style formatted file output
|
||||
---- Copyright (C) 1995, 2001 Easics NV
|
||||
----
|
||||
---- This library is free software; you can redistribute it and/or
|
||||
---- modify it under the terms of the GNU Lesser General Public
|
||||
---- License as published by the Free Software Foundation; either
|
||||
---- version 2.1 of the License, or (at your option) any later version.
|
||||
----
|
||||
---- This library is distributed in the hope that it will be useful,
|
||||
---- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
---- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
---- Lesser General Public License for more details.
|
||||
----
|
||||
---- You should have received a copy of the GNU Lesser General Public
|
||||
---- License along with this library; if not, write to the Free Software
|
||||
---- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
----
|
||||
---- For suggestions, bug reports, enhancement requests, and info about
|
||||
---- our design services, you can contact us at the following address:
|
||||
---- http://www.easics.com
|
||||
---- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium
|
||||
---- tel.: +32 16 395 600 fax : +32 16 395 619
|
||||
---- e-mail: jand@easics.be (Jan Decaluwe)
|
||||
----
|
||||
|
||||
|
||||
Changes from version 1.16 to version 2002.07
|
||||
============================================
|
||||
|
||||
PCK_FIO is now distributed under the GNU Lesser General Public Licencse
|
||||
instead of the ordinary GPL, to better reflect intended usage.
|
||||
|
||||
Cosmetic changes in source code to correct some typos in the testbench output.
|
||||
A new testbench is also supplied.
|
||||
|
||||
The package now uses IEEE.numeric_std as default.
|
||||
|
||||
URL http://www.easics.com has been made part of address.
|
||||
|
||||
Changed syntax in the PCK_FIO package and its testbench to support VHDL-1993.
|
||||
Because of backwards-incompatibility, it has been necessary to supply
|
||||
different sets of files for 1987 and 1993.
|
||||
|
||||
Split the packages into a separate file for the header and a
|
||||
separate file for the body (in compliance with Easics' guidelines).
|
||||
|
||||
These changes resulted in the files:
|
||||
|
||||
Files for VHDL-1993:
|
||||
--------------------
|
||||
PCK_FIO_1993.vhd : the source code of the header file for the package
|
||||
PCK_FIO_1993_BODY.vhd: the source code of the body of the package
|
||||
TB_PCK_FIO_1993.vhd: the testbench for the package
|
||||
|
||||
Files for VHDL-1987:
|
||||
--------------------
|
||||
PCK_FIO_1987.vhd: the source code of the header file for the package
|
||||
PCK_FIO_1987_BODY.vhd: the source code of the body of the package
|
||||
TB_PCK_FIO_1987.vhd: the testbench for the package
|
||||
|
||||
Updated README and PCK_FIO.html to support these changes.
|
||||
|
||||
Adapted package files to support NUL termination of strings.
|
||||
fo(Arg: string) now prints the string until the first NUL.
|
||||
Several examples of its use are demonstrated in the supplied testbenches.
|
||||
|
||||
Made cosmetic changes to code to improve readability.
|
||||
|
||||
Acknowledgment
|
||||
--------------
|
||||
These changes have been implemented by Peter Geens.
|
||||
|
||||
|
||||
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+339
-339
@@ -1,339 +1,339 @@
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<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
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<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta name="GENERATOR" content="Mozilla/4.76 [en] (X11; U; Linux 2.4.13 i686) [Netscape]">
|
||||
<title>VHDL package for formatted file output</title>
|
||||
<!-- $Id: PCK_FIO.html,v 1.1 2008-08-23 08:20:28 Jens Exp $ -->
|
||||
</head>
|
||||
<body text="#000000" bgcolor="#FFFFFF" link="#0000EE" vlink="#551A8B" alink="#FF0000">
|
||||
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_name_0"></a>Name</h1>
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||||
<b>PCK_FIO</b> - VHDL package for formatted file output
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
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||||
<h1>
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||||
Contents</h1>
|
||||
<a href="#PCK_FIO_usage_0">Usage</a>
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||||
<br><a href="#PCK_FIO_file_0">The file output function 'fo'</a>
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||||
<br><a href="#PCK_FIO_format_0">Format specifiers</a>
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||||
<br><a href="#PCK_FIO_special_0">Special characters</a>
|
||||
<br><a href="#PCK_FIO_things_0">Things to watch out for</a>
|
||||
<br><a href="#PCK_FIO_methodology_0">Methodology notes</a>
|
||||
<br><a href="#PCK_FIO_parametrization_0">Parametrization</a>
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||||
<br><a href="#PCK_FIO_test_0">Test bench</a>
|
||||
<br><a href="#PCK_FIO_limitations_0">Known limitations and problems</a>
|
||||
<br><a href="#PCK_FIO_author_0">Author</a>
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
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||||
<h1>
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<a NAME="PCK_FIO_usage_0"></a>Usage</h1>
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||||
PCK_FIO is a VHDL package that defines <tt>fprint, </tt>a function
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||||
for formatted file output.
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||||
<p>After installing the package you can call <tt>fprint</tt> as follows:
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||||
<pre> fprint(F, L, Format, fo(Expr_1), fo(Expr_2), ... fo(Expr_n));</pre>
|
||||
where F is the filehandle and L is the line variable.
|
||||
<p>The argument Format is the format string, which consists of ``normal''
|
||||
substrings which are copied verbatim, and format specifiers, starting with
|
||||
<tt>'%'</tt>.
|
||||
A typical format string looks as follows:
|
||||
<pre> "Arg1 = %6r, Arg2 = %10d, Arg3 = %-5r\n"</pre>
|
||||
The remaining arguments are the expressions whose results you want to write
|
||||
to the file, embedded in <tt>fo</tt> function calls. There can be 0 to
|
||||
32 of such arguments. The expressions can be of any type for which an <tt>fo</tt>
|
||||
function exists. String expressions can also be called directly.
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_file_0"></a>The file output function <tt>'fo'</tt></h1>
|
||||
The <tt>fo</tt> (<u>f</u>ile <u>o</u>utput) functions do the trick. They
|
||||
return a tagged string representation that is meaningful to format specifiers.
|
||||
Here are some examples:
|
||||
<pre> fo (signed'("1100")) returns "S:1100"
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||||
fo (unsigned'("1100")) returns "U:1100"
|
||||
fo (TRUE) returns "L:T"
|
||||
fo (127) returns "I:127"</pre>
|
||||
The internal behavior of <tt>fo</tt> is irrelevant to the typical user.
|
||||
<br>
|
||||
<pre>The <tt>fo</tt> function is currently overloaded as follows:</pre>
|
||||
|
||||
<pre> function fo (Arg: unsigned) return string;
|
||||
function fo (Arg: signed) return string;
|
||||
function fo (Arg: std_logic_vector) return string;
|
||||
function fo (Arg: std_ulogic_vector) return string;
|
||||
function fo (Arg: bit_vector) return string;
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||||
function fo (Arg: integer) return string;
|
||||
function fo (Arg: std_ulogic) return string;
|
||||
function fo (Arg: bit) return string;
|
||||
function fo (Arg: boolean) return string;
|
||||
function fo (Arg: character) return string;
|
||||
function fo (Arg: string) return string;
|
||||
function fo (Arg: time) return string;</pre>
|
||||
|
||||
<p><br>To support null-terminated strings, the function <tt>fo</tt>(Arg:
|
||||
string) processes <tt>Arg</tt> up to the first <tt>NUL</tt> character,
|
||||
if any. If you want the whole string to be outputted you can just enter
|
||||
the string as a direct argument in <tt>fprint</tt>. See also the
|
||||
examples in the testbench.
|
||||
<pre>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%"></pre>
|
||||
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_format_0"></a>Format specifiers</h1>
|
||||
The general format of a format specifier is:
|
||||
<pre> %[-][n]c</pre>
|
||||
The optional <b>-</b> sign specifies left justified output; default is
|
||||
right justified.
|
||||
<p>The optional number <b>n</b> specifies a field-width. If it is not specified,
|
||||
<tt>fprint</tt>
|
||||
does something reasonable.
|
||||
<p><b>c</b> is the conversion specifier. Currently the following conversion
|
||||
specifiers are supported:
|
||||
<dl COMPACT>
|
||||
<dt>
|
||||
<a NAME="PCK_FIO_r_0"></a><b>r</b></dt>
|
||||
|
||||
<dd>
|
||||
reasonable output format (inspired by Synopsys VSS)</dd>
|
||||
|
||||
<dl COMPACT>Prints the ``most reasonable'' representation e.g. hex for
|
||||
unsigned, signed and other bit-like vectors (not preferred for integers)</dl>
|
||||
|
||||
<dt>
|
||||
<a NAME="PCK_FIO_b_0"></a><b>b</b></dt>
|
||||
|
||||
<dd>
|
||||
bit-oriented output</dd>
|
||||
|
||||
<dt>
|
||||
<a NAME="PCK_FIO_d_0"></a><b>d</b></dt>
|
||||
|
||||
<dd>
|
||||
decimal output</dd>
|
||||
|
||||
<dt>
|
||||
<a NAME="PCK_FIO_s_0"></a><b>s</b></dt>
|
||||
|
||||
<dd>
|
||||
string output (e.g. in combination with 'IMAGE for enum types)</dd>
|
||||
|
||||
<dt>
|
||||
<a NAME="PCK_FIO_q_0"></a><b>q</b></dt>
|
||||
|
||||
<dd>
|
||||
``qualified'' string output (shows internal representation from <tt>fo</tt>)</dd>
|
||||
|
||||
<dt>
|
||||
<a NAME="PCK_FIO__0"></a><b>{}</b></dt>
|
||||
|
||||
<dd>
|
||||
Iteration operator, used as follows:</dd>
|
||||
|
||||
<dd>
|
||||
<tt>%n{<format-string>}</tt></dd>
|
||||
|
||||
<br>In this case, <b>n</b> is the iteration count and is mandatory. Iteration
|
||||
can be nested.</dl>
|
||||
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_special_0"></a>Special characters</h1>
|
||||
To print a double quote, use <tt>'""'</tt> in the format string (VHDL
|
||||
convention). To print the special characters, <tt>'\'</tt>, and <tt>'%'</tt>,
|
||||
escape them with <tt>'\'</tt>. To prevent <tt>'{'</tt> and <tt>'}'</tt>
|
||||
from being interpreted as opening and closing brackets in iteration strings,
|
||||
escape them with <tt>'\'</tt>.
|
||||
<p>A newline is specified in the format string by <tt>'\n'</tt>.
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_things_0"></a>Things to notice</h1>
|
||||
The fprint function expands into VHDL <tt>write</tt> and <tt>writeline</tt>
|
||||
commands. As in plain VHDL, nothing will be written to the output file
|
||||
until a <tt>writeline</tt> is given. Therefore, don't forget to include
|
||||
<tt>'\n'</tt>
|
||||
commands in the format string, or it ``will not work''.
|
||||
<p>The preferred format specifier for integers is, naturally, <b>%d</b>.
|
||||
This calls the VHDL <tt>write</tt> for integers. If you specify a field
|
||||
width that is too small, the field will automatically be expanded. If you
|
||||
use <b>%r</b> for integers, the field is not expanded automatically, which
|
||||
means that some digits are simply thrown away. This may sometimes be useful
|
||||
but it is also dangerous. Look at the test bench output for differences
|
||||
between <b>%d</b> and <b>%r</b> output.
|
||||
<p>When using the <b>%d</b> format specifier, the VHDL constraints for
|
||||
the allowed integer range apply.
|
||||
<p>In VHDL, signed/unsigned types have been standardized only relatively
|
||||
recently, in the package <tt>IEEE.numeric_std</tt>. The lack of a standard
|
||||
has caused (and is causing) portability issues. The most popular non-standard
|
||||
package that defines signed/unsigned is <tt>IEEE.std_logic_arith</tt> from
|
||||
Synopsys. PCK_FIO works with both packages, but refers to the standard
|
||||
package <tt>IEEE.numeric_std</tt> by default. To use <tt>IEEE.std_logic_arith</tt>
|
||||
instead, replace the reference to <tt>IEEE.numeric_std</tt> in the source
|
||||
code. This needs to be done consistently in a design database (e.g.
|
||||
in the PCK_FIO test bench as well).
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_methodology_0"></a>Methodology notes</h1>
|
||||
The obvious application for <tt>fprint</tt> is in test benches, to produce
|
||||
output files that trace the simulation behavior.
|
||||
<p>Another interesting application for <tt>fprint</tt> is to produce info,
|
||||
warning and error messages in your models. As it can take arguments, <tt>fprint</tt>
|
||||
is much better suited for this task than VHDL's <tt>assert</tt> or <tt>report</tt>
|
||||
statements. Actually <tt>fprint</tt> produces its own (few) warning messages.
|
||||
<p>An advanced usage is the generation of test vectors in a specific format.
|
||||
Instead of using the <tt>fo </tt>functions, you can write your own set
|
||||
of functions that return the symbols of a specific test format in a way
|
||||
that is understandable to the <tt>fprint</tt> format specifiers. As an
|
||||
example, when a high output value should be represented using the symbol
|
||||
'H' it suffices to write a conversion function that returns "B:H" and call
|
||||
it in combination with the <b>%b</b> format specifier.
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_parametrization_0"></a>Parametrization</h1>
|
||||
Prefix and postfix strings for bit-oriented and hex-oriented output are
|
||||
parameterizable in the packages to accommodate different output styles.
|
||||
The settings in the distribution are such that hex output is indicated
|
||||
by the prefix '0x', while bit output prefix and postfix are empty
|
||||
strings.
|
||||
<p>You can adapt the output style by modifying the following constants
|
||||
in the package header:
|
||||
<p> <tt> -- prefix string for hex output</tt>
|
||||
<br><tt> -- VHDL style: "X"""</tt>
|
||||
<br><tt> -- Verilog style: "h'"</tt>
|
||||
<br><tt> -- C style: "0x"</tt>
|
||||
<br><tt> constant FIO_h_PRE: string := "0x";</tt>
|
||||
<p><tt> -- postfix string for hex output</tt>
|
||||
<br><tt> -- VHDL style: """"</tt>
|
||||
<br><tt> constant FIO_h_POST: string := "";</tt>
|
||||
<p><tt> -- prefix string for bit vector output</tt>
|
||||
<br><tt> -- VHDL style: "B"""</tt>
|
||||
<br><tt> -- Verilog style: "b'"</tt>
|
||||
<br><tt> constant FIO_bv_PRE: string := "";</tt>
|
||||
<p><tt> -- postfix string for bit vector output</tt>
|
||||
<br><tt> -- VHDL style: """"</tt>
|
||||
<br><tt> constant FIO_bv_POST: string := "";</tt>
|
||||
<p><tt> -- prefix string for bit output</tt>
|
||||
<br><tt> -- VHDL style: "'"</tt>
|
||||
<br><tt> -- Verilog style: "b'"</tt>
|
||||
<br><tt> constant FIO_b_PRE: string := "";</tt>
|
||||
<p><tt> -- postfix string for bit output</tt>
|
||||
<br><tt> -- VHDL style: "'"</tt>
|
||||
<br><tt> constant FIO_b_POST: string := "";</tt>
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_test_0"></a>Test bench</h1>
|
||||
Included in the distribution are the files <tt>TB_PCK_FIO_1987.vhd and
|
||||
TB_PCK_FIO_1993</tt> with a test bench,depending on the standard you're
|
||||
running, for the PCK_FIO package. The file <tt>PCK_FIO.out.gold </tt>contains
|
||||
the expected output. If you run the test bench it should produce the file
|
||||
<tt>PCK_FIO.out</tt>
|
||||
that should be identical to <tt>PCK_FIO.out.gold</tt>. The source files
|
||||
should be analyzed in a VHDL library <tt>EASICS_PACKAGES</tt>.
|
||||
<p>A good way to understand <tt>fprint</tt> is to inspect the test bench
|
||||
and what it produces.
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_limitations_0"></a>Known limitations and problems</h1>
|
||||
This VHDL package is an implementation of a flexible concept. It is likely
|
||||
to be extended and modified in the future. Backward compatibility is not
|
||||
guaranteed. Therefore, it is not recommended to give this package the status
|
||||
of a company wide standard package (or even worse, a VHDL standard package).
|
||||
Rather, it should be linked with a particular project (and it can be regarded
|
||||
as a standard package within that project).
|
||||
<p>PCK_FIO is available in either standard VHDL Std1076-1987 or standard
|
||||
VHDL Std1076-1993. Nevertheless, some simulators/versions have problems
|
||||
with the package. The following is an overview of currently known issues:
|
||||
<br>
|
||||
<center><table BORDER COLS=2 WIDTH="80%" NOSAVE >
|
||||
<caption>PCK_FIO_1987 and various simulators/versions</caption>
|
||||
|
||||
<tr>
|
||||
<th>Simulator</th>
|
||||
|
||||
<th>PCK_FIO_1987</th>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Synopsys VSS 3.5 and earlier</td>
|
||||
|
||||
<td>Incorrect (all zero) output in compiled mode</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Synopsys VSS 97.01</td>
|
||||
|
||||
<td>OK</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Synopsys VSS/Scirocco 2000.02</td>
|
||||
|
||||
<td>Incorrect output in compiled mode, interpreted mode works</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Mentor quickhdl</td>
|
||||
|
||||
<td>OK</td>
|
||||
</tr>
|
||||
|
||||
<tr NOSAVE>
|
||||
<td NOSAVE>Modeltech modelsim</td>
|
||||
|
||||
<td>OK</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Cadence Leapfrog</td>
|
||||
|
||||
<td>Should work with 4.4.1
|
||||
<br>Mysterious problems have been reported - please run the test bench
|
||||
and report problems</td>
|
||||
</tr>
|
||||
</table></center>
|
||||
|
||||
<br>
|
||||
<center><table BORDER COLS=2 WIDTH="80%" NOSAVE >
|
||||
<caption>PCK_FIO_1993 and various simulators/versions</caption>
|
||||
|
||||
<tr NOSAVE>
|
||||
<th NOSAVE>Simulator</th>
|
||||
|
||||
<th NOSAVE>PCK_FIO_1993</th>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Synopsys VSS/Scirocco 2000.02</td>
|
||||
|
||||
<td>Compile errors due to improper handling of files by Synopsys</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Synopsys VSS/Scirocco 2000.06</td>
|
||||
|
||||
<td>works fine</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Modeltech modelsim 5.4c and higher</td>
|
||||
|
||||
<td>OK</td>
|
||||
</tr>
|
||||
</table></center>
|
||||
|
||||
<p>Although the package name suggests file IO, it only does file output.
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_author_0"></a>Author</h1>
|
||||
<a href="mailto:jand@easics.be">Jan Decaluwe</a>
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
</body>
|
||||
</html>
|
||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
||||
<html>
|
||||
<head>
|
||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
||||
<meta name="GENERATOR" content="Mozilla/4.76 [en] (X11; U; Linux 2.4.13 i686) [Netscape]">
|
||||
<title>VHDL package for formatted file output</title>
|
||||
<!-- $Id: PCK_FIO.html,v 1.1 2008/08/23 08:20:28 Jens Exp $ -->
|
||||
</head>
|
||||
<body text="#000000" bgcolor="#FFFFFF" link="#0000EE" vlink="#551A8B" alink="#FF0000">
|
||||
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_name_0"></a>Name</h1>
|
||||
<b>PCK_FIO</b> - VHDL package for formatted file output
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
Contents</h1>
|
||||
<a href="#PCK_FIO_usage_0">Usage</a>
|
||||
<br><a href="#PCK_FIO_file_0">The file output function 'fo'</a>
|
||||
<br><a href="#PCK_FIO_format_0">Format specifiers</a>
|
||||
<br><a href="#PCK_FIO_special_0">Special characters</a>
|
||||
<br><a href="#PCK_FIO_things_0">Things to watch out for</a>
|
||||
<br><a href="#PCK_FIO_methodology_0">Methodology notes</a>
|
||||
<br><a href="#PCK_FIO_parametrization_0">Parametrization</a>
|
||||
<br><a href="#PCK_FIO_test_0">Test bench</a>
|
||||
<br><a href="#PCK_FIO_limitations_0">Known limitations and problems</a>
|
||||
<br><a href="#PCK_FIO_author_0">Author</a>
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_usage_0"></a>Usage</h1>
|
||||
PCK_FIO is a VHDL package that defines <tt>fprint, </tt>a function
|
||||
for formatted file output.
|
||||
<p>After installing the package you can call <tt>fprint</tt> as follows:
|
||||
<pre> fprint(F, L, Format, fo(Expr_1), fo(Expr_2), ... fo(Expr_n));</pre>
|
||||
where F is the filehandle and L is the line variable.
|
||||
<p>The argument Format is the format string, which consists of ``normal''
|
||||
substrings which are copied verbatim, and format specifiers, starting with
|
||||
<tt>'%'</tt>.
|
||||
A typical format string looks as follows:
|
||||
<pre> "Arg1 = %6r, Arg2 = %10d, Arg3 = %-5r\n"</pre>
|
||||
The remaining arguments are the expressions whose results you want to write
|
||||
to the file, embedded in <tt>fo</tt> function calls. There can be 0 to
|
||||
32 of such arguments. The expressions can be of any type for which an <tt>fo</tt>
|
||||
function exists. String expressions can also be called directly.
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_file_0"></a>The file output function <tt>'fo'</tt></h1>
|
||||
The <tt>fo</tt> (<u>f</u>ile <u>o</u>utput) functions do the trick. They
|
||||
return a tagged string representation that is meaningful to format specifiers.
|
||||
Here are some examples:
|
||||
<pre> fo (signed'("1100")) returns "S:1100"
|
||||
fo (unsigned'("1100")) returns "U:1100"
|
||||
fo (TRUE) returns "L:T"
|
||||
fo (127) returns "I:127"</pre>
|
||||
The internal behavior of <tt>fo</tt> is irrelevant to the typical user.
|
||||
<br>
|
||||
<pre>The <tt>fo</tt> function is currently overloaded as follows:</pre>
|
||||
|
||||
<pre> function fo (Arg: unsigned) return string;
|
||||
function fo (Arg: signed) return string;
|
||||
function fo (Arg: std_logic_vector) return string;
|
||||
function fo (Arg: std_ulogic_vector) return string;
|
||||
function fo (Arg: bit_vector) return string;
|
||||
function fo (Arg: integer) return string;
|
||||
function fo (Arg: std_ulogic) return string;
|
||||
function fo (Arg: bit) return string;
|
||||
function fo (Arg: boolean) return string;
|
||||
function fo (Arg: character) return string;
|
||||
function fo (Arg: string) return string;
|
||||
function fo (Arg: time) return string;</pre>
|
||||
|
||||
<p><br>To support null-terminated strings, the function <tt>fo</tt>(Arg:
|
||||
string) processes <tt>Arg</tt> up to the first <tt>NUL</tt> character,
|
||||
if any. If you want the whole string to be outputted you can just enter
|
||||
the string as a direct argument in <tt>fprint</tt>. See also the
|
||||
examples in the testbench.
|
||||
<pre>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%"></pre>
|
||||
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_format_0"></a>Format specifiers</h1>
|
||||
The general format of a format specifier is:
|
||||
<pre> %[-][n]c</pre>
|
||||
The optional <b>-</b> sign specifies left justified output; default is
|
||||
right justified.
|
||||
<p>The optional number <b>n</b> specifies a field-width. If it is not specified,
|
||||
<tt>fprint</tt>
|
||||
does something reasonable.
|
||||
<p><b>c</b> is the conversion specifier. Currently the following conversion
|
||||
specifiers are supported:
|
||||
<dl COMPACT>
|
||||
<dt>
|
||||
<a NAME="PCK_FIO_r_0"></a><b>r</b></dt>
|
||||
|
||||
<dd>
|
||||
reasonable output format (inspired by Synopsys VSS)</dd>
|
||||
|
||||
<dl COMPACT>Prints the ``most reasonable'' representation e.g. hex for
|
||||
unsigned, signed and other bit-like vectors (not preferred for integers)</dl>
|
||||
|
||||
<dt>
|
||||
<a NAME="PCK_FIO_b_0"></a><b>b</b></dt>
|
||||
|
||||
<dd>
|
||||
bit-oriented output</dd>
|
||||
|
||||
<dt>
|
||||
<a NAME="PCK_FIO_d_0"></a><b>d</b></dt>
|
||||
|
||||
<dd>
|
||||
decimal output</dd>
|
||||
|
||||
<dt>
|
||||
<a NAME="PCK_FIO_s_0"></a><b>s</b></dt>
|
||||
|
||||
<dd>
|
||||
string output (e.g. in combination with 'IMAGE for enum types)</dd>
|
||||
|
||||
<dt>
|
||||
<a NAME="PCK_FIO_q_0"></a><b>q</b></dt>
|
||||
|
||||
<dd>
|
||||
``qualified'' string output (shows internal representation from <tt>fo</tt>)</dd>
|
||||
|
||||
<dt>
|
||||
<a NAME="PCK_FIO__0"></a><b>{}</b></dt>
|
||||
|
||||
<dd>
|
||||
Iteration operator, used as follows:</dd>
|
||||
|
||||
<dd>
|
||||
<tt>%n{<format-string>}</tt></dd>
|
||||
|
||||
<br>In this case, <b>n</b> is the iteration count and is mandatory. Iteration
|
||||
can be nested.</dl>
|
||||
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_special_0"></a>Special characters</h1>
|
||||
To print a double quote, use <tt>'""'</tt> in the format string (VHDL
|
||||
convention). To print the special characters, <tt>'\'</tt>, and <tt>'%'</tt>,
|
||||
escape them with <tt>'\'</tt>. To prevent <tt>'{'</tt> and <tt>'}'</tt>
|
||||
from being interpreted as opening and closing brackets in iteration strings,
|
||||
escape them with <tt>'\'</tt>.
|
||||
<p>A newline is specified in the format string by <tt>'\n'</tt>.
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_things_0"></a>Things to notice</h1>
|
||||
The fprint function expands into VHDL <tt>write</tt> and <tt>writeline</tt>
|
||||
commands. As in plain VHDL, nothing will be written to the output file
|
||||
until a <tt>writeline</tt> is given. Therefore, don't forget to include
|
||||
<tt>'\n'</tt>
|
||||
commands in the format string, or it ``will not work''.
|
||||
<p>The preferred format specifier for integers is, naturally, <b>%d</b>.
|
||||
This calls the VHDL <tt>write</tt> for integers. If you specify a field
|
||||
width that is too small, the field will automatically be expanded. If you
|
||||
use <b>%r</b> for integers, the field is not expanded automatically, which
|
||||
means that some digits are simply thrown away. This may sometimes be useful
|
||||
but it is also dangerous. Look at the test bench output for differences
|
||||
between <b>%d</b> and <b>%r</b> output.
|
||||
<p>When using the <b>%d</b> format specifier, the VHDL constraints for
|
||||
the allowed integer range apply.
|
||||
<p>In VHDL, signed/unsigned types have been standardized only relatively
|
||||
recently, in the package <tt>IEEE.numeric_std</tt>. The lack of a standard
|
||||
has caused (and is causing) portability issues. The most popular non-standard
|
||||
package that defines signed/unsigned is <tt>IEEE.std_logic_arith</tt> from
|
||||
Synopsys. PCK_FIO works with both packages, but refers to the standard
|
||||
package <tt>IEEE.numeric_std</tt> by default. To use <tt>IEEE.std_logic_arith</tt>
|
||||
instead, replace the reference to <tt>IEEE.numeric_std</tt> in the source
|
||||
code. This needs to be done consistently in a design database (e.g.
|
||||
in the PCK_FIO test bench as well).
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_methodology_0"></a>Methodology notes</h1>
|
||||
The obvious application for <tt>fprint</tt> is in test benches, to produce
|
||||
output files that trace the simulation behavior.
|
||||
<p>Another interesting application for <tt>fprint</tt> is to produce info,
|
||||
warning and error messages in your models. As it can take arguments, <tt>fprint</tt>
|
||||
is much better suited for this task than VHDL's <tt>assert</tt> or <tt>report</tt>
|
||||
statements. Actually <tt>fprint</tt> produces its own (few) warning messages.
|
||||
<p>An advanced usage is the generation of test vectors in a specific format.
|
||||
Instead of using the <tt>fo </tt>functions, you can write your own set
|
||||
of functions that return the symbols of a specific test format in a way
|
||||
that is understandable to the <tt>fprint</tt> format specifiers. As an
|
||||
example, when a high output value should be represented using the symbol
|
||||
'H' it suffices to write a conversion function that returns "B:H" and call
|
||||
it in combination with the <b>%b</b> format specifier.
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_parametrization_0"></a>Parametrization</h1>
|
||||
Prefix and postfix strings for bit-oriented and hex-oriented output are
|
||||
parameterizable in the packages to accommodate different output styles.
|
||||
The settings in the distribution are such that hex output is indicated
|
||||
by the prefix '0x', while bit output prefix and postfix are empty
|
||||
strings.
|
||||
<p>You can adapt the output style by modifying the following constants
|
||||
in the package header:
|
||||
<p> <tt> -- prefix string for hex output</tt>
|
||||
<br><tt> -- VHDL style: "X"""</tt>
|
||||
<br><tt> -- Verilog style: "h'"</tt>
|
||||
<br><tt> -- C style: "0x"</tt>
|
||||
<br><tt> constant FIO_h_PRE: string := "0x";</tt>
|
||||
<p><tt> -- postfix string for hex output</tt>
|
||||
<br><tt> -- VHDL style: """"</tt>
|
||||
<br><tt> constant FIO_h_POST: string := "";</tt>
|
||||
<p><tt> -- prefix string for bit vector output</tt>
|
||||
<br><tt> -- VHDL style: "B"""</tt>
|
||||
<br><tt> -- Verilog style: "b'"</tt>
|
||||
<br><tt> constant FIO_bv_PRE: string := "";</tt>
|
||||
<p><tt> -- postfix string for bit vector output</tt>
|
||||
<br><tt> -- VHDL style: """"</tt>
|
||||
<br><tt> constant FIO_bv_POST: string := "";</tt>
|
||||
<p><tt> -- prefix string for bit output</tt>
|
||||
<br><tt> -- VHDL style: "'"</tt>
|
||||
<br><tt> -- Verilog style: "b'"</tt>
|
||||
<br><tt> constant FIO_b_PRE: string := "";</tt>
|
||||
<p><tt> -- postfix string for bit output</tt>
|
||||
<br><tt> -- VHDL style: "'"</tt>
|
||||
<br><tt> constant FIO_b_POST: string := "";</tt>
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_test_0"></a>Test bench</h1>
|
||||
Included in the distribution are the files <tt>TB_PCK_FIO_1987.vhd and
|
||||
TB_PCK_FIO_1993</tt> with a test bench,depending on the standard you're
|
||||
running, for the PCK_FIO package. The file <tt>PCK_FIO.out.gold </tt>contains
|
||||
the expected output. If you run the test bench it should produce the file
|
||||
<tt>PCK_FIO.out</tt>
|
||||
that should be identical to <tt>PCK_FIO.out.gold</tt>. The source files
|
||||
should be analyzed in a VHDL library <tt>EASICS_PACKAGES</tt>.
|
||||
<p>A good way to understand <tt>fprint</tt> is to inspect the test bench
|
||||
and what it produces.
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_limitations_0"></a>Known limitations and problems</h1>
|
||||
This VHDL package is an implementation of a flexible concept. It is likely
|
||||
to be extended and modified in the future. Backward compatibility is not
|
||||
guaranteed. Therefore, it is not recommended to give this package the status
|
||||
of a company wide standard package (or even worse, a VHDL standard package).
|
||||
Rather, it should be linked with a particular project (and it can be regarded
|
||||
as a standard package within that project).
|
||||
<p>PCK_FIO is available in either standard VHDL Std1076-1987 or standard
|
||||
VHDL Std1076-1993. Nevertheless, some simulators/versions have problems
|
||||
with the package. The following is an overview of currently known issues:
|
||||
<br>
|
||||
<center><table BORDER COLS=2 WIDTH="80%" NOSAVE >
|
||||
<caption>PCK_FIO_1987 and various simulators/versions</caption>
|
||||
|
||||
<tr>
|
||||
<th>Simulator</th>
|
||||
|
||||
<th>PCK_FIO_1987</th>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Synopsys VSS 3.5 and earlier</td>
|
||||
|
||||
<td>Incorrect (all zero) output in compiled mode</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Synopsys VSS 97.01</td>
|
||||
|
||||
<td>OK</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Synopsys VSS/Scirocco 2000.02</td>
|
||||
|
||||
<td>Incorrect output in compiled mode, interpreted mode works</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Mentor quickhdl</td>
|
||||
|
||||
<td>OK</td>
|
||||
</tr>
|
||||
|
||||
<tr NOSAVE>
|
||||
<td NOSAVE>Modeltech modelsim</td>
|
||||
|
||||
<td>OK</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Cadence Leapfrog</td>
|
||||
|
||||
<td>Should work with 4.4.1
|
||||
<br>Mysterious problems have been reported - please run the test bench
|
||||
and report problems</td>
|
||||
</tr>
|
||||
</table></center>
|
||||
|
||||
<br>
|
||||
<center><table BORDER COLS=2 WIDTH="80%" NOSAVE >
|
||||
<caption>PCK_FIO_1993 and various simulators/versions</caption>
|
||||
|
||||
<tr NOSAVE>
|
||||
<th NOSAVE>Simulator</th>
|
||||
|
||||
<th NOSAVE>PCK_FIO_1993</th>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Synopsys VSS/Scirocco 2000.02</td>
|
||||
|
||||
<td>Compile errors due to improper handling of files by Synopsys</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Synopsys VSS/Scirocco 2000.06</td>
|
||||
|
||||
<td>works fine</td>
|
||||
</tr>
|
||||
|
||||
<tr>
|
||||
<td>Modeltech modelsim 5.4c and higher</td>
|
||||
|
||||
<td>OK</td>
|
||||
</tr>
|
||||
</table></center>
|
||||
|
||||
<p>Although the package name suggests file IO, it only does file output.
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
<h1>
|
||||
<a NAME="PCK_FIO_author_0"></a>Author</h1>
|
||||
<a href="mailto:jand@easics.be">Jan Decaluwe</a>
|
||||
<p>
|
||||
<hr SIZE=1 NOSHADE WIDTH="100%">
|
||||
</body>
|
||||
</html>
|
||||
|
||||
+105
-105
@@ -1,105 +1,105 @@
|
||||
---- $Id: PCK_FIO_1987.vhd,v 1.1 2008-08-23 08:20:28 Jens Exp $
|
||||
----
|
||||
---- PCK_FIO: a VHDL package for C-style formatted file output
|
||||
---- Copyright (C) 1995, 2001 Easics NV
|
||||
----
|
||||
---- This library is free software; you can redistribute it and/or
|
||||
---- modify it under the terms of the GNU Lesser General Public
|
||||
---- License as published by the Free Software Foundation; either
|
||||
---- version 2.1 of the License, or (at your option) any later version.
|
||||
----
|
||||
---- This library is distributed in the hope that it will be useful,
|
||||
---- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
---- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
---- Lesser General Public License for more details.
|
||||
----
|
||||
---- You should have received a copy of the GNU Lesser General Public
|
||||
---- License along with this library; if not, write to the Free Software
|
||||
---- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
----
|
||||
---- For suggestions, bug reports, enhancement requests, and info about
|
||||
---- our design services, you can contact us at the following address:
|
||||
---- http://www.easics.com
|
||||
---- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium
|
||||
---- tel.: +32 16 395 600 fax : +32 16 395 619
|
||||
---- e-mail: jand@easics.be (Jan Decaluwe)
|
||||
----
|
||||
|
||||
use STD.TEXTIO.all;
|
||||
|
||||
library IEEE;
|
||||
use IEEE.std_logic_1164.all;
|
||||
-- signed/unsigned definition: use either std_logic_arith or numeric_std
|
||||
-- use IEEE.std_logic_arith.all; -- the Synopsys one
|
||||
use IEEE.numeric_std.all;
|
||||
|
||||
package PCK_FIO is
|
||||
|
||||
-- prefix string for hex output
|
||||
-- VHDL style: "X"""
|
||||
-- Verilog style: "h'"
|
||||
-- C style: "0x"
|
||||
constant FIO_h_PRE: string := "0x";
|
||||
|
||||
-- postfix string for hex output
|
||||
-- VHDL style: """"
|
||||
constant FIO_h_POST: string := "";
|
||||
|
||||
-- prefix string for bit vector output
|
||||
-- VHDL style: "B"""
|
||||
-- Verilog style: "b'"
|
||||
constant FIO_bv_PRE: string := "";
|
||||
|
||||
-- postfix string for bit vector output
|
||||
-- VHDL style: """"
|
||||
constant FIO_bv_POST: string := "";
|
||||
|
||||
-- prefix string for bit output
|
||||
-- VHDL style: "'"
|
||||
-- Verilog style: "b'"
|
||||
constant FIO_b_PRE: string := "";
|
||||
|
||||
-- postfix string for bit output
|
||||
-- VHDL style: "'"
|
||||
constant FIO_b_POST: string := "";
|
||||
|
||||
-- digit width for the string representation of integers
|
||||
constant FIO_d_WIDTH: integer := 10;
|
||||
|
||||
-- bit width for the string representation of integers
|
||||
constant FIO_b_WIDTH: integer := 32;
|
||||
|
||||
-- definition of the NIL string (default value for fprint arguments)
|
||||
-- fprint stops consuming arguments at the first NIL argument
|
||||
constant FIO_NIL: string := "\";
|
||||
|
||||
|
||||
procedure fprint
|
||||
(F: out text;
|
||||
L: inout line;
|
||||
Format: in string;
|
||||
A1 , A2 , A3 , A4 , A5 , A6 , A7 , A8 : in string := FIO_NIL;
|
||||
A9 , A10, A11, A12, A13, A14, A15, A16: in string := FIO_NIL;
|
||||
A17, A18, A19, A20, A21, A22, A23, A24: in string := FIO_NIL;
|
||||
A25, A26, A27, A28, A29, A30, A31, A32: in string := FIO_NIL
|
||||
);
|
||||
|
||||
function fo (Arg: unsigned) return string;
|
||||
function fo (Arg: signed) return string;
|
||||
function fo (Arg: std_logic_vector) return string;
|
||||
function fo (Arg: std_ulogic_vector) return string;
|
||||
function fo (Arg: bit_vector) return string;
|
||||
function fo (Arg: integer) return string;
|
||||
function fo (Arg: std_ulogic) return string;
|
||||
function fo (Arg: bit) return string;
|
||||
function fo (Arg: boolean) return string;
|
||||
function fo (Arg: character) return string;
|
||||
function fo (Arg: string) return string;
|
||||
function fo (Arg: time) return string;
|
||||
|
||||
procedure FIO_FormatExpand (FMT: inout line;
|
||||
Format: in string;
|
||||
StartPointer: in positive);
|
||||
|
||||
end PCK_FIO;
|
||||
|
||||
---- $Id: PCK_FIO_1987.vhd,v 1.1 2008/08/23 08:20:28 Jens Exp $
|
||||
----
|
||||
---- PCK_FIO: a VHDL package for C-style formatted file output
|
||||
---- Copyright (C) 1995, 2001 Easics NV
|
||||
----
|
||||
---- This library is free software; you can redistribute it and/or
|
||||
---- modify it under the terms of the GNU Lesser General Public
|
||||
---- License as published by the Free Software Foundation; either
|
||||
---- version 2.1 of the License, or (at your option) any later version.
|
||||
----
|
||||
---- This library is distributed in the hope that it will be useful,
|
||||
---- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
---- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
---- Lesser General Public License for more details.
|
||||
----
|
||||
---- You should have received a copy of the GNU Lesser General Public
|
||||
---- License along with this library; if not, write to the Free Software
|
||||
---- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
----
|
||||
---- For suggestions, bug reports, enhancement requests, and info about
|
||||
---- our design services, you can contact us at the following address:
|
||||
---- http://www.easics.com
|
||||
---- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium
|
||||
---- tel.: +32 16 395 600 fax : +32 16 395 619
|
||||
---- e-mail: jand@easics.be (Jan Decaluwe)
|
||||
----
|
||||
|
||||
use STD.TEXTIO.all;
|
||||
|
||||
library IEEE;
|
||||
use IEEE.std_logic_1164.all;
|
||||
-- signed/unsigned definition: use either std_logic_arith or numeric_std
|
||||
-- use IEEE.std_logic_arith.all; -- the Synopsys one
|
||||
use IEEE.numeric_std.all;
|
||||
|
||||
package PCK_FIO is
|
||||
|
||||
-- prefix string for hex output
|
||||
-- VHDL style: "X"""
|
||||
-- Verilog style: "h'"
|
||||
-- C style: "0x"
|
||||
constant FIO_h_PRE: string := "0x";
|
||||
|
||||
-- postfix string for hex output
|
||||
-- VHDL style: """"
|
||||
constant FIO_h_POST: string := "";
|
||||
|
||||
-- prefix string for bit vector output
|
||||
-- VHDL style: "B"""
|
||||
-- Verilog style: "b'"
|
||||
constant FIO_bv_PRE: string := "";
|
||||
|
||||
-- postfix string for bit vector output
|
||||
-- VHDL style: """"
|
||||
constant FIO_bv_POST: string := "";
|
||||
|
||||
-- prefix string for bit output
|
||||
-- VHDL style: "'"
|
||||
-- Verilog style: "b'"
|
||||
constant FIO_b_PRE: string := "";
|
||||
|
||||
-- postfix string for bit output
|
||||
-- VHDL style: "'"
|
||||
constant FIO_b_POST: string := "";
|
||||
|
||||
-- digit width for the string representation of integers
|
||||
constant FIO_d_WIDTH: integer := 10;
|
||||
|
||||
-- bit width for the string representation of integers
|
||||
constant FIO_b_WIDTH: integer := 32;
|
||||
|
||||
-- definition of the NIL string (default value for fprint arguments)
|
||||
-- fprint stops consuming arguments at the first NIL argument
|
||||
constant FIO_NIL: string := "\";
|
||||
|
||||
|
||||
procedure fprint
|
||||
(F: out text;
|
||||
L: inout line;
|
||||
Format: in string;
|
||||
A1 , A2 , A3 , A4 , A5 , A6 , A7 , A8 : in string := FIO_NIL;
|
||||
A9 , A10, A11, A12, A13, A14, A15, A16: in string := FIO_NIL;
|
||||
A17, A18, A19, A20, A21, A22, A23, A24: in string := FIO_NIL;
|
||||
A25, A26, A27, A28, A29, A30, A31, A32: in string := FIO_NIL
|
||||
);
|
||||
|
||||
function fo (Arg: unsigned) return string;
|
||||
function fo (Arg: signed) return string;
|
||||
function fo (Arg: std_logic_vector) return string;
|
||||
function fo (Arg: std_ulogic_vector) return string;
|
||||
function fo (Arg: bit_vector) return string;
|
||||
function fo (Arg: integer) return string;
|
||||
function fo (Arg: std_ulogic) return string;
|
||||
function fo (Arg: bit) return string;
|
||||
function fo (Arg: boolean) return string;
|
||||
function fo (Arg: character) return string;
|
||||
function fo (Arg: string) return string;
|
||||
function fo (Arg: time) return string;
|
||||
|
||||
procedure FIO_FormatExpand (FMT: inout line;
|
||||
Format: in string;
|
||||
StartPointer: in positive);
|
||||
|
||||
end PCK_FIO;
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
+108
-108
@@ -1,108 +1,108 @@
|
||||
---- $Id: PCK_FIO_1993.vhd,v 1.1 2008-08-23 08:20:28 Jens Exp $
|
||||
----
|
||||
---- PCK_FIO: a VHDL package for C-style formatted file output
|
||||
---- Copyright (C) 1995, 2001 Easics NV
|
||||
----
|
||||
---- This library is free software; you can redistribute it and/or
|
||||
---- modify it under the terms of the GNU Lesser General Public
|
||||
---- License as published by the Free Software Foundation; either
|
||||
---- version 2.1 of the License, or (at your option) any later version.
|
||||
----
|
||||
---- This library is distributed in the hope that it will be useful,
|
||||
---- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
---- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
---- Lesser General Public License for more details.
|
||||
----
|
||||
---- You should have received a copy of the GNU Lesser General Public
|
||||
---- License along with this library; if not, write to the Free Software
|
||||
---- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
----
|
||||
---- For suggestions, bug reports, enhancement requests, and info about
|
||||
---- our design services, you can contact us at the following address:
|
||||
---- http://www.easics.com
|
||||
---- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium
|
||||
---- tel.: +32 16 395 600 fax : +32 16 395 619
|
||||
---- e-mail: jand@easics.be (Jan Decaluwe)
|
||||
----
|
||||
|
||||
|
||||
use STD.TEXTIO.all;
|
||||
|
||||
library IEEE;
|
||||
use IEEE.std_logic_1164.all;
|
||||
-- signed/unsigned definition: use either std_logic_arith or numeric_std
|
||||
-- use IEEE.std_logic_arith.all; -- the Synopsys one
|
||||
use IEEE.numeric_std.all;
|
||||
|
||||
package PCK_FIO is
|
||||
|
||||
|
||||
-- prefix string for hex output
|
||||
-- VHDL style: "X"""
|
||||
-- Verilog style: "h'"
|
||||
-- C style: "0x"
|
||||
constant FIO_h_PRE: string := "0x";
|
||||
|
||||
-- postfix string for hex output
|
||||
-- VHDL style: """"
|
||||
constant FIO_h_POST: string := "";
|
||||
|
||||
-- prefix string for bit vector output
|
||||
-- VHDL style: "B"""
|
||||
-- Verilog style: "b'"
|
||||
constant FIO_bv_PRE: string := "";
|
||||
|
||||
-- postfix string for bit vector output
|
||||
-- VHDL style: """"
|
||||
constant FIO_bv_POST: string := "";
|
||||
|
||||
-- prefix string for bit output
|
||||
-- VHDL style: "'"
|
||||
-- Verilog style: "b'"
|
||||
constant FIO_b_PRE: string := "";
|
||||
|
||||
-- postfix string for bit output
|
||||
-- VHDL style: "'"
|
||||
constant FIO_b_POST: string := "";
|
||||
|
||||
-- digit width for the string representation of integers
|
||||
constant FIO_d_WIDTH: integer := 10;
|
||||
|
||||
-- bit width for the string representation of integers
|
||||
constant FIO_b_WIDTH: integer := 32;
|
||||
|
||||
-- definition of the NIL string (default value for fprint arguments)
|
||||
-- fprint stops consuming arguments at the first NIL argument
|
||||
constant FIO_NIL: string := "\";
|
||||
|
||||
procedure fprint
|
||||
(file F: text;
|
||||
L: inout line;
|
||||
Format: in string;
|
||||
A1 , A2 , A3 , A4 , A5 , A6 , A7 , A8 : in string := FIO_NIL;
|
||||
A9 , A10, A11, A12, A13, A14, A15, A16: in string := FIO_NIL;
|
||||
A17, A18, A19, A20, A21, A22, A23, A24: in string := FIO_NIL;
|
||||
A25, A26, A27, A28, A29, A30, A31, A32: in string := FIO_NIL
|
||||
);
|
||||
|
||||
function fo (Arg: unsigned) return string;
|
||||
function fo (Arg: signed) return string;
|
||||
function fo (Arg: std_logic_vector) return string;
|
||||
function fo (Arg: std_ulogic_vector) return string;
|
||||
function fo (Arg: bit_vector) return string;
|
||||
function fo (Arg: integer) return string;
|
||||
function fo (Arg: std_ulogic) return string;
|
||||
function fo (Arg: bit) return string;
|
||||
function fo (Arg: boolean) return string;
|
||||
function fo (Arg: character) return string;
|
||||
function fo (Arg: string) return string;
|
||||
function fo (Arg: time) return string;
|
||||
|
||||
procedure FIO_FormatExpand (FMT: inout line;
|
||||
Format: in string;
|
||||
StartPointer: in positive);
|
||||
|
||||
end PCK_FIO;
|
||||
|
||||
|
||||
|
||||
---- $Id: PCK_FIO_1993.vhd,v 1.1 2008/08/23 08:20:28 Jens Exp $
|
||||
----
|
||||
---- PCK_FIO: a VHDL package for C-style formatted file output
|
||||
---- Copyright (C) 1995, 2001 Easics NV
|
||||
----
|
||||
---- This library is free software; you can redistribute it and/or
|
||||
---- modify it under the terms of the GNU Lesser General Public
|
||||
---- License as published by the Free Software Foundation; either
|
||||
---- version 2.1 of the License, or (at your option) any later version.
|
||||
----
|
||||
---- This library is distributed in the hope that it will be useful,
|
||||
---- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
---- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
---- Lesser General Public License for more details.
|
||||
----
|
||||
---- You should have received a copy of the GNU Lesser General Public
|
||||
---- License along with this library; if not, write to the Free Software
|
||||
---- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
----
|
||||
---- For suggestions, bug reports, enhancement requests, and info about
|
||||
---- our design services, you can contact us at the following address:
|
||||
---- http://www.easics.com
|
||||
---- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium
|
||||
---- tel.: +32 16 395 600 fax : +32 16 395 619
|
||||
---- e-mail: jand@easics.be (Jan Decaluwe)
|
||||
----
|
||||
|
||||
|
||||
use STD.TEXTIO.all;
|
||||
|
||||
library IEEE;
|
||||
use IEEE.std_logic_1164.all;
|
||||
-- signed/unsigned definition: use either std_logic_arith or numeric_std
|
||||
-- use IEEE.std_logic_arith.all; -- the Synopsys one
|
||||
use IEEE.numeric_std.all;
|
||||
|
||||
package PCK_FIO is
|
||||
|
||||
|
||||
-- prefix string for hex output
|
||||
-- VHDL style: "X"""
|
||||
-- Verilog style: "h'"
|
||||
-- C style: "0x"
|
||||
constant FIO_h_PRE: string := "0x";
|
||||
|
||||
-- postfix string for hex output
|
||||
-- VHDL style: """"
|
||||
constant FIO_h_POST: string := "";
|
||||
|
||||
-- prefix string for bit vector output
|
||||
-- VHDL style: "B"""
|
||||
-- Verilog style: "b'"
|
||||
constant FIO_bv_PRE: string := "";
|
||||
|
||||
-- postfix string for bit vector output
|
||||
-- VHDL style: """"
|
||||
constant FIO_bv_POST: string := "";
|
||||
|
||||
-- prefix string for bit output
|
||||
-- VHDL style: "'"
|
||||
-- Verilog style: "b'"
|
||||
constant FIO_b_PRE: string := "";
|
||||
|
||||
-- postfix string for bit output
|
||||
-- VHDL style: "'"
|
||||
constant FIO_b_POST: string := "";
|
||||
|
||||
-- digit width for the string representation of integers
|
||||
constant FIO_d_WIDTH: integer := 10;
|
||||
|
||||
-- bit width for the string representation of integers
|
||||
constant FIO_b_WIDTH: integer := 32;
|
||||
|
||||
-- definition of the NIL string (default value for fprint arguments)
|
||||
-- fprint stops consuming arguments at the first NIL argument
|
||||
constant FIO_NIL: string := "\";
|
||||
|
||||
procedure fprint
|
||||
(file F: text;
|
||||
L: inout line;
|
||||
Format: in string;
|
||||
A1 , A2 , A3 , A4 , A5 , A6 , A7 , A8 : in string := FIO_NIL;
|
||||
A9 , A10, A11, A12, A13, A14, A15, A16: in string := FIO_NIL;
|
||||
A17, A18, A19, A20, A21, A22, A23, A24: in string := FIO_NIL;
|
||||
A25, A26, A27, A28, A29, A30, A31, A32: in string := FIO_NIL
|
||||
);
|
||||
|
||||
function fo (Arg: unsigned) return string;
|
||||
function fo (Arg: signed) return string;
|
||||
function fo (Arg: std_logic_vector) return string;
|
||||
function fo (Arg: std_ulogic_vector) return string;
|
||||
function fo (Arg: bit_vector) return string;
|
||||
function fo (Arg: integer) return string;
|
||||
function fo (Arg: std_ulogic) return string;
|
||||
function fo (Arg: bit) return string;
|
||||
function fo (Arg: boolean) return string;
|
||||
function fo (Arg: character) return string;
|
||||
function fo (Arg: string) return string;
|
||||
function fo (Arg: time) return string;
|
||||
|
||||
procedure FIO_FormatExpand (FMT: inout line;
|
||||
Format: in string;
|
||||
StartPointer: in positive);
|
||||
|
||||
end PCK_FIO;
|
||||
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
+88
-88
@@ -1,88 +1,88 @@
|
||||
---- $Id: README,v 1.1 2008-08-23 08:20:28 Jens Exp $
|
||||
----
|
||||
---- PCK_FIO: a VHDL package for C-style formatted file output
|
||||
---- Copyright (C) 1995, 2001 Easics NV
|
||||
----
|
||||
---- This library is free software; you can redistribute it and/or
|
||||
---- modify it under the terms of the GNU Lesser General Public
|
||||
---- License as published by the Free Software Foundation; either
|
||||
---- version 2.1 of the License, or (at your option) any later version.
|
||||
----
|
||||
---- This library is distributed in the hope that it will be useful,
|
||||
---- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
---- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
---- Lesser General Public License for more details.
|
||||
----
|
||||
---- You should have received a copy of the GNU Lesser General Public
|
||||
---- License along with this library; if not, write to the Free Software
|
||||
---- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
----
|
||||
---- For suggestions, bug reports, enhancement requests, and info about
|
||||
---- our design services, you can contact us at the following address:
|
||||
---- http://www.easics.com
|
||||
---- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium
|
||||
---- tel.: +32 16 395 600 fax : +32 16 395 619
|
||||
---- e-mail: jand@easics.be (Jan Decaluwe)
|
||||
----
|
||||
|
||||
Version 2002.07
|
||||
===============
|
||||
|
||||
Contents
|
||||
========
|
||||
|
||||
This distribution contains the following files:
|
||||
|
||||
PCK_FIO_1987.vhd: VHDL-87 source of the header of the PCK_FIO package
|
||||
PCK_FIO_1987_BODY.vhd: VHDL-87 source of the body of the PCK_FIO package
|
||||
PCK_FIO_1993.vhd: VHDL-93 source of the header of the PCK_FIO package
|
||||
PCK_FIO_1993_BODY.vhd: VHDL-93 source of the body of the PCK_FIO package
|
||||
TB_PCK_FIO_1987.vhd: VHDL-87 source of the testbench for package PCK_FIO
|
||||
TB_PCK_FIO_1993.vhd: VHDL-93 source of the testbench for package PCK_FIO
|
||||
PCK_FIO.out.gold: Certified test bench output
|
||||
PCK_FIO.html: Manual for PCK_FIO in html format
|
||||
README: This file
|
||||
|
||||
|
||||
Installation
|
||||
============
|
||||
|
||||
VHDL-1987
|
||||
---------
|
||||
To install PCK_FIO, define a VHDL library called EASICS_PACKAGES, and
|
||||
analyze the VHDL file PCK_FIO_1987.vhd and PCK_FIO_1987_BODY.vhd into this library.
|
||||
|
||||
To install the test bench, analyze TB_PCK_FIO_1987.vhd into the same library.
|
||||
|
||||
VHDL-1993
|
||||
---------
|
||||
To install PCK_FIO, define a VHDL library called EASICS_PACKAGES, and
|
||||
analyze the VHDL file PCK_FIO_1993.vhd and PCK_FIO_1993_BODY.vhd into this library.
|
||||
|
||||
To install the test bench, analyze TB_PCK_FIO_1993.vhd into the same library.
|
||||
|
||||
Numeric packages
|
||||
----------------
|
||||
If you want to use IEEE.std_logic_arith instead of IEEE.numeric_std, you need
|
||||
to edit the source code of the package, both header and body, and the test bench
|
||||
and replace the package use clause. PCK_FIO works with either of these packages.
|
||||
|
||||
Documentation
|
||||
-------------
|
||||
To install the documentation, put the file point PCK_FIO.html in a path of
|
||||
your choosing, point your web browser to it, and bookmark it.
|
||||
|
||||
|
||||
Installation check
|
||||
==================
|
||||
|
||||
After installing the test bench, you should run it. The corresponding VHDL
|
||||
design unit is EASICS_PACKAGES.TBE_PCK_FIO(TB).
|
||||
|
||||
Simulating the test bench should create a file called PCK_FIO.out. This file
|
||||
should be identical to PCK_FIO.out.gold. Any difference indicates a portability
|
||||
issue or a simulator non-compliance or bug.
|
||||
|
||||
|
||||
|
||||
|
||||
---- $Id: README,v 1.1 2008/08/23 08:20:28 Jens Exp $
|
||||
----
|
||||
---- PCK_FIO: a VHDL package for C-style formatted file output
|
||||
---- Copyright (C) 1995, 2001 Easics NV
|
||||
----
|
||||
---- This library is free software; you can redistribute it and/or
|
||||
---- modify it under the terms of the GNU Lesser General Public
|
||||
---- License as published by the Free Software Foundation; either
|
||||
---- version 2.1 of the License, or (at your option) any later version.
|
||||
----
|
||||
---- This library is distributed in the hope that it will be useful,
|
||||
---- but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
---- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
---- Lesser General Public License for more details.
|
||||
----
|
||||
---- You should have received a copy of the GNU Lesser General Public
|
||||
---- License along with this library; if not, write to the Free Software
|
||||
---- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
----
|
||||
---- For suggestions, bug reports, enhancement requests, and info about
|
||||
---- our design services, you can contact us at the following address:
|
||||
---- http://www.easics.com
|
||||
---- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium
|
||||
---- tel.: +32 16 395 600 fax : +32 16 395 619
|
||||
---- e-mail: jand@easics.be (Jan Decaluwe)
|
||||
----
|
||||
|
||||
Version 2002.07
|
||||
===============
|
||||
|
||||
Contents
|
||||
========
|
||||
|
||||
This distribution contains the following files:
|
||||
|
||||
PCK_FIO_1987.vhd: VHDL-87 source of the header of the PCK_FIO package
|
||||
PCK_FIO_1987_BODY.vhd: VHDL-87 source of the body of the PCK_FIO package
|
||||
PCK_FIO_1993.vhd: VHDL-93 source of the header of the PCK_FIO package
|
||||
PCK_FIO_1993_BODY.vhd: VHDL-93 source of the body of the PCK_FIO package
|
||||
TB_PCK_FIO_1987.vhd: VHDL-87 source of the testbench for package PCK_FIO
|
||||
TB_PCK_FIO_1993.vhd: VHDL-93 source of the testbench for package PCK_FIO
|
||||
PCK_FIO.out.gold: Certified test bench output
|
||||
PCK_FIO.html: Manual for PCK_FIO in html format
|
||||
README: This file
|
||||
|
||||
|
||||
Installation
|
||||
============
|
||||
|
||||
VHDL-1987
|
||||
---------
|
||||
To install PCK_FIO, define a VHDL library called EASICS_PACKAGES, and
|
||||
analyze the VHDL file PCK_FIO_1987.vhd and PCK_FIO_1987_BODY.vhd into this library.
|
||||
|
||||
To install the test bench, analyze TB_PCK_FIO_1987.vhd into the same library.
|
||||
|
||||
VHDL-1993
|
||||
---------
|
||||
To install PCK_FIO, define a VHDL library called EASICS_PACKAGES, and
|
||||
analyze the VHDL file PCK_FIO_1993.vhd and PCK_FIO_1993_BODY.vhd into this library.
|
||||
|
||||
To install the test bench, analyze TB_PCK_FIO_1993.vhd into the same library.
|
||||
|
||||
Numeric packages
|
||||
----------------
|
||||
If you want to use IEEE.std_logic_arith instead of IEEE.numeric_std, you need
|
||||
to edit the source code of the package, both header and body, and the test bench
|
||||
and replace the package use clause. PCK_FIO works with either of these packages.
|
||||
|
||||
Documentation
|
||||
-------------
|
||||
To install the documentation, put the file point PCK_FIO.html in a path of
|
||||
your choosing, point your web browser to it, and bookmark it.
|
||||
|
||||
|
||||
Installation check
|
||||
==================
|
||||
|
||||
After installing the test bench, you should run it. The corresponding VHDL
|
||||
design unit is EASICS_PACKAGES.TBE_PCK_FIO(TB).
|
||||
|
||||
Simulating the test bench should create a file called PCK_FIO.out. This file
|
||||
should be identical to PCK_FIO.out.gold. Any difference indicates a portability
|
||||
issue or a simulator non-compliance or bug.
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user