diff --git a/projects/mips_sys/sim/tb_mips_sys.wdo b/projects/mips_sys/sim/tb_mips_sys.wdo
index 21ac107..3a874c7 100644
--- a/projects/mips_sys/sim/tb_mips_sys.wdo
+++ b/projects/mips_sys/sim/tb_mips_sys.wdo
@@ -193,16 +193,16 @@ add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/
 add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
 add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_pipeline/cpu_run
 add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/inst_reg_dual/reg_mem
-add wave -noupdate -format Logic /tb_mips_sys/uut/clk_o
+add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/cpu_clk_out
 add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/id_stage
 add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
-add wave -noupdate -format Logic /tb_mips_sys/uut/clk_o
+add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/cpu_clk_out
 add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/ex_stage
 add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
-add wave -noupdate -format Logic /tb_mips_sys/uut/clk_o
+add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/cpu_clk_out
 add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/mem_stage
 add wave -noupdate -format Literal /tb_mips_sys/uut/inst_mips_top/inst_pipeline/sdu
-add wave -noupdate -format Logic /tb_mips_sys/uut/clk_o
+add wave -noupdate -format Logic /tb_mips_sys/uut/inst_clockgen/cpu_clk_out
 add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/wb_stage
 add wave -noupdate -divider {CPU DMEM}
 add wave -noupdate -format Logic /tb_mips_sys/uut/clk_o
@@ -233,7 +233,7 @@ add wave -noupdate -format Logic -label .branch -radix hexadecimal /tb_mips_sys/
 add wave -noupdate -divider D-Cache
 add wave -noupdate -format Logic /tb_mips_sys/uut/clk_o
 TreeUpdate [SetDefaultTree]
-WaveRestoreCursors {{Cursor 2} {73611245 ps} 0} {{Cursor 100} {45292347 ps} 0}
+WaveRestoreCursors {{Cursor 2} {73611245 ps} 0} {{Cursor 100} {29884668 ps} 0} {{Cursor 3} {4840402000 ps} 0}
 configure wave -namecolwidth 187
 configure wave -valuecolwidth 64
 configure wave -justifyvalue left
@@ -247,4 +247,4 @@ configure wave -gridperiod 100
 configure wave -griddelta 40
 configure wave -timeline 1
 update
-WaveRestoreZoom {111269597 ps} {211375285 ps}
+WaveRestoreZoom {4840006260 ps} {4842142452 ps}