From 6afb5d9c2e2ac125e082d488f3c7aec5ed6f0bb3 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sun, 15 Feb 2009 17:33:07 +0000 Subject: [PATCH] - minor changes Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@355 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/CPUs/MIPS/sim/tb_mips_top.wdo | 83 +++++++++++++++++++++++++++++-- 1 file changed, 78 insertions(+), 5 deletions(-) diff --git a/lib/CPUs/MIPS/sim/tb_mips_top.wdo b/lib/CPUs/MIPS/sim/tb_mips_top.wdo index 6bff41f..ad0a7dd 100644 --- a/lib/CPUs/MIPS/sim/tb_mips_top.wdo +++ b/lib/CPUs/MIPS/sim/tb_mips_top.wdo @@ -39,10 +39,37 @@ add wave -noupdate -format Literal /tb_mips_top/sram_be_n add wave -noupdate -divider ALU add wave -noupdate -format Logic /tb_mips_top/clk add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/hdu +add wave -noupdate -format Literal -expand /tb_mips_top/uut/inst_pipeline/sdu add wave -noupdate -divider PC add wave -noupdate -format Logic /tb_mips_top/clk -add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/pc -add wave -noupdate -divider PC +add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/pc +add wave -noupdate -divider COP0 +add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/inst_cop/events +add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/inst_cop/ctrl_in +add wave -noupdate -format Literal -expand /tb_mips_top/uut/inst_pipeline/inst_cop/ctrl_out +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/inst_cop/epc +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/inst_cop/cause +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/inst_cop/status +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/inst_cop/badvaddr +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/inst_cop/exc_code +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/stat_reg_we +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/eflags_reg_we +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/epc_reg_we +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/code_reg_we +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/ip_reg_we +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/bd +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/status_save +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/status_rest +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/exception +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/exception_end +add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/inst_cop/eflags +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/exc_enable +add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/inst_cop/cop_ex_en +add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/inst_cop/cop_pipe_id +add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/inst_cop/cop_pipe_ex +add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/inst_cop/exc_state +add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/inst_cop/exc_staten +add wave -noupdate -divider Pipestages add wave -noupdate -format Logic /tb_mips_top/clk add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/id_stage add wave -noupdate -format Logic /tb_mips_top/clk @@ -53,9 +80,55 @@ add wave -noupdate -format Logic /tb_mips_top/clk add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/wb_stage add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/rst add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/cpu_run -add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/inst_reg_dual/reg_mem +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/inst_reg_dual/reg_mem +add wave -noupdate -divider I-Cache +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/en +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_en +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_addr +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cpu_dout +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_busy +add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/s +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cache_busy +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cache_miss +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/tag_match +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/word_index_reg +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/cache_index_reg +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_icache/tag_index_reg +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/cpu_reg_en +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_icache/was_miss +add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_icache/cache_entry_out +add wave -noupdate -divider D-Cache +add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/s +add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_addr +add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_din +add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/cpu_dout +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_busy +add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/tram_addr_rd +add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/tram_addr_wr +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/tram_we +add wave -noupdate -format Literal -expand /tb_mips_top/uut/inst_biu/inst_dcache/cache_entry_out +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cache_busy +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cache_hit +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/tag_match +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/word_index_reg +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/addr_windex_reg +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/cache_index_reg +add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_biu/inst_dcache/tag_index_reg +add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/fill_count +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/fill_count_en +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/fill_count_rdy +add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/flush_count +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/flush_count_en +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/flush_count_rdy +add wave -noupdate -format Literal /tb_mips_top/uut/inst_biu/inst_dcache/request_count +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/request_count_en +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/request_count_rdy +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_reg_en +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/was_miss +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/cpu_hit_we +add wave -noupdate -format Logic /tb_mips_top/uut/inst_biu/inst_dcache/instant_raw TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {1133514966 ps} 0} +WaveRestoreCursors {{Cursor 1} {2158634 ps} 0} configure wave -namecolwidth 188 configure wave -valuecolwidth 100 configure wave -justifyvalue left @@ -69,4 +142,4 @@ configure wave -gridperiod 100 configure wave -griddelta 40 configure wave -timeline 1 update -WaveRestoreZoom {256143063 ps} {1670729313 ps} +WaveRestoreZoom {2118570 ps} {2318226 ps}