- added new FIFO generics

Committed on the Free edition of March Hare Software CVSNT Server.
Upgrade to CVS Suite for more features and support:
http://march-hare.com/cvsnt/


git-svn-id: http://moon:8086/svn/vhdl/trunk@749 cc03376c-175c-47c8-b038-4cd826a8556b

lib/FIFO/src/fifo_sync.vhd

@@ -34,7 +34,11 @@ entity fifo_sync is
 		addr_width			: natural := 4;
 		data_width			: natural := 8;
 		almost_full_thresh	: integer := 12;
-		almost_empty_thresh	: integer := 4
+		almost_empty_thresh	: integer := 4;
+		allow_full_writes	: boolean := false;
+		allow_empty_reads	: boolean := false;
+		do_last_read_update	: boolean := true
+		
 	);
 	Port
 	(
@@ -58,14 +62,20 @@ architecture Behavioral of fifo_sync is
 	signal ptr_w		: unsigned (addr_width-1 downto 0);
 	signal ptr_r		: unsigned (addr_width-1 downto 0);
 	signal full			: STD_LOGIC;
+	signal empty		: std_logic;
 	signal pre_full		: STD_LOGIC;
 	signal pre_empty	: STD_LOGIC;
+	signal rinc			: std_logic;
 	
 begin
 
-	mem_wr_en	<= not full;
-	mem_rd_en	<= not pre_empty;
 	fifo_full	<= full;
+	fifo_empty	<= empty;
+
+	mem_wr_en	<= (we and not full) when allow_full_writes = false else we;
+	rinc		<= (re and not empty) when allow_empty_reads = false else re;
+	mem_rd_en	<= not pre_empty when do_last_read_update = false else '1';
+
 
 inst_fifo_sync_ctrl: entity work.fifo_sync_ctrl
 	GENERIC MAP
@@ -78,12 +88,12 @@ inst_fifo_sync_ctrl: entity work.fifo_sync_ctrl
 	(
 		rst				=>	rst,
 		clk				=>	clk,
-		we				=>	we,
-		re				=>	re,
+		winc			=>	mem_wr_en,
+		rinc			=>	rinc,
 		ptr_w			=>	ptr_w,
 		ptr_r			=>	ptr_r,
 		fifo_full		=>	full,
-		fifo_empty		=>	fifo_empty,
+		fifo_empty		=>	empty,
 		fifo_pre_full	=>	pre_full,
 		fifo_pre_empty	=>	pre_empty,
 		fifo_afull		=>	fifo_afull,
@@ -100,9 +110,9 @@ inst_dpram_1w1r: entity work.dpram_1w1r
 	PORT MAP(
 		clka		=> clk,
 		clkb		=> clk,
-		en_a		=> mem_wr_en,
+		en_a		=> '1',
 		en_b		=> mem_rd_en,
-		we_a		=> we,
+		we_a		=> mem_wr_en,
 		addr_a		=> ptr_w,
 		addr_b		=> ptr_r,
 		din_a		=> data_w,