From 643a506496c20fd43971f86872622ae8d273f453 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Tue, 3 Nov 2009 22:52:50 +0000 Subject: [PATCH] - changed TIMESPEC for VGA - added TIMESPEC for SDRAM - SDRAM_CLK is now unrelated to SYS_CLK Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@591 cc03376c-175c-47c8-b038-4cd826a8556b --- projects/mips_sys/ise101/mips_sys/ucf/systest.ucf | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/projects/mips_sys/ise101/mips_sys/ucf/systest.ucf b/projects/mips_sys/ise101/mips_sys/ucf/systest.ucf index 0eab88d..b6a97d9 100644 --- a/projects/mips_sys/ise101/mips_sys/ucf/systest.ucf +++ b/projects/mips_sys/ise101/mips_sys/ucf/systest.ucf @@ -20,19 +20,23 @@ CONFIG STEPPING = "ES"; # Bus clock nets -NET "clk" TNM_NET = "clk"; -TIMESPEC "TS_clk" = PERIOD "clk" 9.9 ns HIGH 50 %; +NET "sys_clk_in" TNM_NET = "sys_clk"; +TIMESPEC "TS_clk" = PERIOD "sys_clk" 9.9 ns HIGH 50 %; -NET "inst_vga_frontend/inst_vga_backend/inst_clkgen/vga_clk0" TNM_NET = "vga_clk"; +NET "sdram_clk0" TNM_NET = "sdram_clk"; +TIMESPEC "TS_sdram_clk" = PERIOD "sdram_clk" 9.9 ns HIGH 50 %; +TIMESPEC "TS_unrelate_SDRAM" = FROM sys_clk TO sdram_clk TIG; + +NET "vga_clk" TNM_NET = "vga_clk"; #TIMESPEC "TS_vga_clk" = PERIOD "vga_clk" 7.5 ns HIGH 50 %; -TIMESPEC TS_unrelate = FROM clk TO vga_clk TIG; +TIMESPEC "TS_unrelate_VGA" = FROM sys_clk TO vga_clk TIG; NET "sys_clk_in" LOC = "AE14"; NET sys_clk_in IOSTANDARD = LVCMOS33; NET "sys_rst_n_in" LOC = "D6"; NET sys_rst_n_in PULLUP; NET "sys_rst_n_in" TIG; -NET "rst" TIG; +NET "RST_O" TIG; NET "sys_clk_in" CLOCK_DEDICATED_ROUTE = FALSE; PIN "inst_clockgen/inst_DCM_BASE_0.CLKIN" CLOCK_DEDICATED_ROUTE = FALSE;