- simplified clock stuff

git-svn-id: http://moon:8086/svn/vhdl/trunk@1165 cc03376c-175c-47c8-b038-4cd826a8556b
2015-05-23 08:30:01 +00:00
parent 752b788327
commit 628593a879
2 changed files with 47 additions and 98 deletions
@@ -810,24 +810,35 @@ inst_ssram_port_wb : entity work.ssram_port_wb
 		ssram_bw_n		=> sys_ssram_bw_n
 	);

-inst_sys_clock : entity work.sys_clock
+inst_clockgen_cpu : entity work.clockgen
 	GENERIC MAP
 	(
-		clk_in_freq				=> sys_freq_in,
-		cpu_clk_out_freq		=> cpu_freq,
-		vga_clk_out_freq		=> vga_freq
+		clk_in_freq			=> sys_freq_in,
+		clk_out_freq		=> cpu_freq
 	)
 	PORT MAP 
 	(
 		-- Clocks and Reset
-		rst_in				=> rst_in,   -- external async reset, low active
-		clk_in				=> sys_clk_in,   -- system clock (e.g. 100MHz), from board
-		cpu_clk_out			=> CLK_O,
-		cpu_rst_out			=> RST_O,  
-		vga_clk_out			=> vga_clk,
-		vga_rst_out			=> vga_rst
+		rst_in				=> rst_in,
+		clk_in				=> sys_clk_in,
+		clk_out				=> CLK_O,
+		rst_out				=> RST_O
 	);

+inst_clocken_vga : entity work.clockgen
+	GENERIC MAP
+	(
+		clk_in_freq			=> sys_freq_in,
+		clk_out_freq		=> vga_freq
+	)
+	PORT MAP 
+	(
+		-- Clocks and Reset
+		rst_in				=> rst_in,
+		clk_in				=> sys_clk_in,
+		clk_out				=> vga_clk,
+		rst_out				=> vga_rst
+	);

 inst_sdram_ctrl_frontend_wb : entity work.sdram_ctrl_frontend64_wb
 	GENERIC MAP