diff --git a/lib/FIFO/sim/tb_gray_counter.wdo b/lib/FIFO/sim/tb_gray_counter.wdo index b33112f..dd0c3c2 100644 --- a/lib/FIFO/sim/tb_gray_counter.wdo +++ b/lib/FIFO/sim/tb_gray_counter.wdo @@ -3,12 +3,16 @@ quietly WaveActivateNextPane {} 0 add wave -noupdate -format Logic /tb_gray_counter/rst add wave -noupdate -format Logic /tb_gray_counter/ce add wave -noupdate -format Logic /tb_gray_counter/clk +add wave -noupdate -divider add wave -noupdate -format Literal /tb_gray_counter/bcnt +add wave -noupdate -divider add wave -noupdate -format Literal /tb_gray_counter/bnxt +add wave -noupdate -divider add wave -noupdate -format Literal /tb_gray_counter/gcnt +add wave -noupdate -divider add wave -noupdate -format Literal /tb_gray_counter/gnxt TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {20898 ps} 0} +WaveRestoreCursors {{Cursor 1} {61919 ps} 0} configure wave -namecolwidth 150 configure wave -valuecolwidth 100 configure wave -justifyvalue left @@ -22,4 +26,4 @@ configure wave -gridperiod 1 configure wave -griddelta 40 configure wave -timeline 0 update -WaveRestoreZoom {0 ps} {134759 ps} +WaveRestoreZoom {915144 ps} {1004467 ps} diff --git a/lib/FIFO/src/gray_counter.vhd b/lib/FIFO/src/gray_counter.vhd index 66fc155..990f15b 100644 --- a/lib/FIFO/src/gray_counter.vhd +++ b/lib/FIFO/src/gray_counter.vhd @@ -48,31 +48,29 @@ end gray_counter; architecture Behavioral of gray_counter is + signal cntg : unsigned (width-1 downto 0); signal cntb : unsigned (width-1 downto 0); signal nxtb : unsigned (width-1 downto 0); - signal cntg : unsigned (width-1 downto 0); signal nxtg : unsigned (width-1 downto 0); begin bnxt <= nxtb; gnxt <= nxtg; + bcnt <= cntb; + gcnt <= cntg; process(rst, clk, ce, cntb, nxtb) begin if rst = '1' then cntb <= to_unsigned(init_value, width); nxtb <= to_unsigned(init_value, width); - cntg <= to_unsigned(init_value, width); nxtg <= to_unsigned(init_value, width); - bcnt <= to_unsigned(init_value, width); - gcnt <= to_unsigned(init_value, width); + cntg <= to_unsigned(init_value, width); else if rising_edge(clk) then - bcnt <= nxtb; - gcnt <= nxtg; - cntb <= nxtb; cntg <= nxtg; + cntb <= nxtb; end if; nxtg <= bin2gray(nxtb); nxtb <= cntb; diff --git a/lib/FIFO/src/tb_gray_counter.vhd b/lib/FIFO/src/tb_gray_counter.vhd index 00380d7..1fd241d 100644 --- a/lib/FIFO/src/tb_gray_counter.vhd +++ b/lib/FIFO/src/tb_gray_counter.vhd @@ -11,7 +11,7 @@ -- Description: -- ----------------------------------------------------------------------- --- $Header: /tmp/cvsroot/VHDL/lib/FIFO/src/tb_gray_counter.vhd,v 1.1 2008-08-23 08:20:28 Jens Exp $ +-- $Header: /tmp/cvsroot/VHDL/lib/FIFO/src/tb_gray_counter.vhd,v 1.2 2010-02-13 10:50:47 Jens Exp $ ----------------------------------------------------------------------- LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; @@ -65,15 +65,17 @@ inst_gray_counter : entity work.gray_counter wait for 4*PERIOD; rst <= '0'; - wait for 1*PERIOD; + wait until rising_edge(clk); ce <= '1'; + wait for 2*PERIOD; + wait until rising_edge(clk); + ce <= '0'; wait for 3*PERIOD; - ce <= '0'; - wait for 4*PERIOD; + wait until rising_edge(clk); ce <= '1'; - wait for 1*PERIOD; + wait until rising_edge(clk); ce <= '0'; - wait for 1*PERIOD; + wait until rising_edge(clk); ce <= '1'; wait;