Force VCD

2022-06-30 22:16:13 +02:00
parent 2c6a0b9c99
commit 6085b37907
3 changed files with 6 additions and 0 deletions
@@ -0,0 +1,4 @@
+.gitignore
+build/
+.gitignore
+build/
@@ -11,5 +11,6 @@ SRCS += $(MOD_PATH)/src/tb_ram_wb.vhd
 TARGET := tb_ram_wb
 ENTITY := tb_ram_wb
 RUN_TIME := 1500ns
+WAVE_FORMAT := vcd

 include $(VHDL_HOME)/make/ghdl.mk
@@ -10,6 +10,7 @@ SRCS += $(MOD_PATH)/src/tb_rom_wb.vhd
 TARGET := tb_rom_wb
 ENTITY := tb_rom_wb
 RUN_TIME := 1500ns
+WAVE_FORMAT := vcd

 include $(VHDL_HOME)/make/ghdl.mk