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git-svn-id: http://moon:8086/svn/vhdl/trunk@93 cc03376c-175c-47c8-b038-4cd826a8556b
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jens
2008-10-21 19:29:57 +00:00
parent 1929d9374e
commit 5bd0c6ea4a
2 changed files with 2 additions and 0 deletions
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projects/mips_sys/ise92/mips_sys/mips_sys.prj
+1
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@@ -35,6 +35,7 @@ vhdl work "../../../../lib/uart/uart_wb.vhd"
vhdl work "../../../../lib/misc/rom_wb.vhd"
vhdl work "../../../../lib/misc/ram_wb.vhd"
vhdl work "../../../../lib/misc/lcd_port.vhd"
vhdl work "../../../../lib/misc/gpio_wb.vhd"
vhdl work "../../../../lib/misc/clockgen_virtex4.vhd"
vhdl work "../../../../lib/misc/async_port_wb.vhd"
vhdl work "../../../../lib/VGA_ctrl/src/vga_frontend.vhd"
projects/mips_sys/ise92/mips_sys/mips_sys_vhdl.prj
+1
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@@ -35,6 +35,7 @@ vhdl work "W:\vhdl\lib\uart\uart_wb.vhd"
vhdl work "W:\vhdl\lib\misc\rom_wb.vhd"
vhdl work "W:\vhdl\lib\misc\ram_wb.vhd"
vhdl work "W:\vhdl\lib\misc\lcd_port.vhd"
vhdl work "W:\vhdl\lib\misc\gpio_wb.vhd"
vhdl work "W:\vhdl\lib\misc\clockgen_virtex4.vhd"
vhdl work "W:\vhdl\lib\misc\async_port_wb.vhd"
vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_frontend.vhd"