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- fixed some bugs

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git-svn-id: http://moon:8086/svn/vhdl/trunk@128 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2008-10-26 23:17:57 +00:00
parent 11129059e7
commit 529658b710
3 changed files with 62 additions and 38 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CPUs/MIPS/sim/tb_mips_muldiv.fdo
+1 -1
View File
@@ -12,4 +12,4 @@ view wave
view structure view structure
view signals view signals
run 5000us run 8ms
lib/CPUs/MIPS/sim/tb_mips_muldiv.wdo
+5 -5
View File
@@ -6,15 +6,15 @@ add wave -noupdate -format Logic /tb_mips_muldiv/mul_divn
add wave -noupdate -format Logic /tb_mips_muldiv/start add wave -noupdate -format Logic /tb_mips_muldiv/start
add wave -noupdate -format Logic /tb_mips_muldiv/busy add wave -noupdate -format Logic /tb_mips_muldiv/busy
add wave -noupdate -format Logic /tb_mips_muldiv/s_un add wave -noupdate -format Logic /tb_mips_muldiv/s_un
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/ref_hi
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/uut/din_hi add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/uut/din_hi
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/uut/din_lo add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/uut/din_lo
add wave -noupdate -format Logic /tb_mips_muldiv/hilo_sel add wave -noupdate -format Logic /tb_mips_muldiv/hilo_sel
add wave -noupdate -format Logic /tb_mips_muldiv/hilo_we add wave -noupdate -format Logic /tb_mips_muldiv/hilo_we
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/dout add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/dout
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/ref_result add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/ref_result
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/uut/result add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/md_result
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/ref_hi add wave -noupdate -format Logic /tb_mips_muldiv/check
add wave -noupdate -format Literal -radix hexadecimal /tb_mips_muldiv/ref_lo
add wave -noupdate -format Logic /tb_mips_muldiv/uut/pre_sum_vld add wave -noupdate -format Logic /tb_mips_muldiv/uut/pre_sum_vld
add wave -noupdate -format Logic /tb_mips_muldiv/uut/mul_en add wave -noupdate -format Logic /tb_mips_muldiv/uut/mul_en
add wave -noupdate -format Logic /tb_mips_muldiv/uut/sum_en add wave -noupdate -format Logic /tb_mips_muldiv/uut/sum_en
@@ -61,7 +61,7 @@ add wave -noupdate -format Literal /tb_mips_muldiv/uut/cycle_cnt_preset
add wave -noupdate -format Literal /tb_mips_muldiv/uut/s add wave -noupdate -format Literal /tb_mips_muldiv/uut/s
add wave -noupdate -format Literal /tb_mips_muldiv/uut/sn add wave -noupdate -format Literal /tb_mips_muldiv/uut/sn
TreeUpdate [SetDefaultTree] TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {4999822285 ps} 0} {{Cursor 2} {102205454 ps} 0} WaveRestoreCursors {{Cursor 1} {7735999838 ps} 0} {{Cursor 2} {512321 ps} 0}
configure wave -namecolwidth 149 configure wave -namecolwidth 149
configure wave -valuecolwidth 171 configure wave -valuecolwidth 171
configure wave -justifyvalue left configure wave -justifyvalue left
@@ -75,4 +75,4 @@ configure wave -gridperiod 100
configure wave -griddelta 40 configure wave -griddelta 40
configure wave -timeline 1 configure wave -timeline 1
update update
WaveRestoreZoom {102150244 ps} {102363615 ps} WaveRestoreZoom {0 ps} {8400 us}
lib/CPUs/MIPS/src/tb_mips_muldiv.vhd
+56 -32
View File
@@ -63,12 +63,14 @@ ARCHITECTURE behavior OF tb_mips_muldiv IS
signal start : std_logic := '0'; signal start : std_logic := '0';
signal din_hi : word_t := (others => '-'); signal din_hi : word_t := (others => '-');
signal din_lo : word_t := (others => '-'); signal din_lo : word_t := (others => '-');
signal ref_hi : word_t := (others => '-');
signal ref_lo : word_t := (others => '-');
signal dout : word_t; signal dout : word_t;
signal hilo_sel : std_logic := '0'; signal hilo_sel : std_logic := '0';
signal result : unsigned (2*word_t'length-1 downto 0); signal md_result : unsigned (2*word_t'length-1 downto 0) := (others => '0');
signal ref_result : unsigned (2*word_t'length-1 downto 0); signal ref_result : unsigned (2*word_t'length-1 downto 0);
signal ref_hi : unsigned (word_t'length-1 downto 0);
signal rtmp : unsigned (2*word_t'length-1 downto 0);
signal tmp2 : unsigned (word_t'length-1 downto 0);
signal check : std_logic;
type word_array_t is array (natural range <>) of word_t; type word_array_t is array (natural range <>) of word_t;
@@ -164,35 +166,31 @@ CLK_GEN: process
end process; end process;
REF_GEN: process REF_GEN: process
variable tmp : unsigned (2*word_t'length-1 downto 0);
variable tmp2 : unsigned (word_t'length-1 downto 0);
begin begin
if mul_divn = '0' then if mul_divn = '0' then
wait until rising_edge(clk) and start = '1'; wait until rising_edge(clk) and check = '1';
ref_lo <= din_lo;
ref_hi <= din_hi;
wait until rising_edge(clk) and busy = '0';
wait until rising_edge(clk);
wait until rising_edge(clk);
if s_un = '1' then if s_un = '1' then
tmp := unsigned(signed(result(31 downto 0)) * signed(ref_lo)); rtmp <= unsigned(signed(md_result(31 downto 0)) * signed(din_lo));
tmp2 := unsigned(signed(tmp(31 downto 0)) + signed(result(63 downto 32))); wait until rising_edge(clk);
ref_result <= X"00000000" & tmp2(31 downto 0); tmp2 <= unsigned(signed(rtmp(31 downto 0)) + signed(md_result(63 downto 32)));
wait until rising_edge(clk);
ref_hi <= tmp2(31 downto 0);
else else
tmp := result(31 downto 0) * ref_lo; rtmp <= md_result(31 downto 0) * din_lo;
tmp2 := tmp(31 downto 0) + result(63 downto 32); wait until rising_edge(clk);
ref_result <= X"00000000" & tmp2(31 downto 0); tmp2 <= rtmp(31 downto 0) + md_result(63 downto 32);
wait until rising_edge(clk);
ref_hi <= tmp2(31 downto 0);
end if; end if;
wait until rising_edge(clk); wait until rising_edge(clk);
if ref_lo /= X"00000000" then if din_lo /= X"00000000" then
if ENABLE_FAIL_REPORT then if ENABLE_FAIL_REPORT then
assert ref_hi = ref_result(31 downto 0) report "Error on divison" severity failure; assert din_hi = ref_hi report "Error on divison" severity failure;
end if; end if;
end if; end if;
else else
wait until rising_edge(clk) and start = '1'; wait until rising_edge(clk) and check = '1';
wait until rising_edge(clk) and busy = '0';
if s_un = '1' then if s_un = '1' then
ref_result <= unsigned(signed(din_hi) * signed(din_lo)); ref_result <= unsigned(signed(din_hi) * signed(din_lo));
else else
@@ -202,7 +200,7 @@ REF_GEN: process
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); wait until rising_edge(clk);
if ENABLE_FAIL_REPORT then if ENABLE_FAIL_REPORT then
assert ref_result = result report "Error on multiplication" severity failure; assert ref_result = md_result report "Error on multiplication" severity failure;
end if; end if;
end if; end if;
@@ -221,6 +219,7 @@ STIMULUS: process
s_un <= '0'; s_un <= '0';
for i in 0 to operands'length-1 loop for i in 0 to operands'length-1 loop
for j in 0 to operands'length-1 loop for j in 0 to operands'length-1 loop
check <= '0';
wait until rising_edge(clk) and busy = '0'; wait until rising_edge(clk) and busy = '0';
din_hi <= operands(i); din_hi <= operands(i);
din_lo <= operands(j); din_lo <= operands(j);
@@ -231,17 +230,23 @@ STIMULUS: process
-- Read result -- Read result
wait until rising_edge(clk) and busy = '0'; wait until rising_edge(clk) and busy = '0';
result(31 downto 0) <= dout; wait until rising_edge(clk);
md_result(31 downto 0) <= dout;
wait until rising_edge(clk);
hilo_sel <= '1'; hilo_sel <= '1';
wait until rising_edge(clk); wait until rising_edge(clk);
result(63 downto 32) <= dout; md_result(63 downto 32) <= dout;
wait for 2*CLK_PERIOD; check <= '1';
wait until rising_edge(clk);
check <= '0';
wait for 8*CLK_PERIOD;
end loop; end loop;
end loop; end loop;
s_un <= '1'; s_un <= '1';
for i in 0 to operands'length-1 loop for i in 0 to operands'length-1 loop
for j in 0 to operands'length-1 loop for j in 0 to operands'length-1 loop
check <= '0';
wait until rising_edge(clk) and busy = '0'; wait until rising_edge(clk) and busy = '0';
din_hi <= operands(i); din_hi <= operands(i);
din_lo <= operands(j); din_lo <= operands(j);
@@ -252,11 +257,16 @@ STIMULUS: process
-- Read result -- Read result
wait until rising_edge(clk) and busy = '0'; wait until rising_edge(clk) and busy = '0';
result(31 downto 0) <= dout; wait until rising_edge(clk);
md_result(31 downto 0) <= dout;
wait until rising_edge(clk);
hilo_sel <= '1'; hilo_sel <= '1';
wait until rising_edge(clk); wait until rising_edge(clk);
result(63 downto 32) <= dout; md_result(63 downto 32) <= dout;
wait for 2*CLK_PERIOD; check <= '1';
wait until rising_edge(clk);
check <= '0';
wait for 8*CLK_PERIOD;
end loop; end loop;
end loop; end loop;
@@ -264,6 +274,7 @@ STIMULUS: process
s_un <= '0'; s_un <= '0';
for i in 0 to operands'length-1 loop for i in 0 to operands'length-1 loop
for j in 0 to operands'length-1 loop for j in 0 to operands'length-1 loop
check <= '0';
wait until rising_edge(clk) and busy = '0'; wait until rising_edge(clk) and busy = '0';
din_hi <= operands(i); din_hi <= operands(i);
din_lo <= operands(j); din_lo <= operands(j);
@@ -274,16 +285,23 @@ STIMULUS: process
-- Read result -- Read result
wait until rising_edge(clk) and busy = '0'; wait until rising_edge(clk) and busy = '0';
result(31 downto 0) <= dout; wait until rising_edge(clk);
md_result(31 downto 0) <= dout;
wait until rising_edge(clk);
hilo_sel <= '1'; hilo_sel <= '1';
wait until rising_edge(clk); wait until rising_edge(clk);
result(63 downto 32) <= dout; md_result(63 downto 32) <= dout;
check <= '1';
wait until rising_edge(clk);
check <= '0';
wait for 8*CLK_PERIOD;
end loop; end loop;
end loop; end loop;
s_un <= '1'; s_un <= '1';
for i in 0 to operands'length-1 loop for i in 0 to operands'length-1 loop
for j in 0 to operands'length-1 loop for j in 0 to operands'length-1 loop
check <= '0';
wait until rising_edge(clk) and busy = '0'; wait until rising_edge(clk) and busy = '0';
din_hi <= operands(i); din_hi <= operands(i);
din_lo <= operands(j); din_lo <= operands(j);
@@ -294,10 +312,16 @@ STIMULUS: process
-- Read result -- Read result
wait until rising_edge(clk) and busy = '0'; wait until rising_edge(clk) and busy = '0';
result(31 downto 0) <= dout; wait until rising_edge(clk);
md_result(31 downto 0) <= dout;
wait until rising_edge(clk);
hilo_sel <= '1'; hilo_sel <= '1';
wait until rising_edge(clk); wait until rising_edge(clk);
result(63 downto 32) <= dout; md_result(63 downto 32) <= dout;
check <= '1';
wait until rising_edge(clk);
check <= '0';
wait for 8*CLK_PERIOD;
end loop; end loop;
end loop; end loop;