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- set 'f_pxl_clk' of 'ts_vga_testbench' tp 40MHz

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git-svn-id: http://moon:8086/svn/vhdl/trunk@672 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-11-22 13:52:27 +00:00
parent 80e3cad985
commit 4ff589039a
1 changed files with 1 additions and 1 deletions
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lib/VGA_ctrl/src/vga_types.vhd
+1 -1
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@@ -44,7 +44,7 @@ package vga_types is
-- For test bench (not for H/W use) -- For test bench (not for H/W use)
constant ts_vga_testbench : vga_timespec_t := constant ts_vga_testbench : vga_timespec_t :=
( (
f_pxl_clk => 100E6, f_pxl_clk => 40E6,
nfps => 6, nfps => 6,
ts_h => (80,5,2,3,'0'), ts_h => (80,5,2,3,'0'),
ts_v => (60,4,2,3,'0') ts_v => (60,4,2,3,'0')