From 4f6b9e2082c68f7adab35060cbff412ad238fb95 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sun, 8 Feb 2009 17:32:22 +0000 Subject: [PATCH] - R0 clear during reset - dmem_be active also during read Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@322 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/CPUs/MIPS/src/core/mips_pipeline.vhd | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/lib/CPUs/MIPS/src/core/mips_pipeline.vhd b/lib/CPUs/MIPS/src/core/mips_pipeline.vhd index a07fffc..16f4505 100644 --- a/lib/CPUs/MIPS/src/core/mips_pipeline.vhd +++ b/lib/CPUs/MIPS/src/core/mips_pipeline.vhd @@ -625,7 +625,7 @@ proc_stage_DMEM_ADDR: end if; end if; end process; - dmem_be <= store_be(EX_stage.pa_off, EX_stage.ctrl.dmem_we, EX_stage.ctrl.word2_en, EX_stage.ctrl.word4_en, EX_stage.ctrl.align_left, EX_stage.ctrl.byte_en_byp) after 1 ns; + dmem_be <= store_be(EX_stage.pa_off, EX_stage.ctrl.dmem_en, EX_stage.ctrl.word2_en, EX_stage.ctrl.word4_en, EX_stage.ctrl.align_left, EX_stage.ctrl.shift_byp) after 1 ns; dmem_we <= EX_stage.ctrl.dmem_we; dmem_dout <= store_shift(EX_stage.reg_b, EX_stage.pa_off, EX_stage.ctrl.shift_offset, EX_stage.ctrl.shift_byp) after 1ns; dmem_addr <= EX_stage.va; @@ -867,7 +867,9 @@ proc_stage_WB_p: if rising_edge(clk_1) then if rst = '1' then WB_stage.op <= NOP; - WB_stage.wreg_we <= '0'; + WB_stage.wreg_we <= '1'; + WB_stage.reg_wptr <= (others => '0'); + WB_stage.data <= (others => '0'); elsif sdu.WB_stall = '0' then WB_stage.op <= MEM_stage.op; WB_stage.wreg_we <= MEM_stage.wreg_we;