diff --git a/lib/CPUs/MIPS/src/core/mips_cop.vhd b/lib/CPUs/MIPS/src/core/mips_cop.vhd
index e99025b..9952ab9 100644
--- a/lib/CPUs/MIPS/src/core/mips_cop.vhd
+++ b/lib/CPUs/MIPS/src/core/mips_cop.vhd
@@ -44,7 +44,6 @@ entity cop is
 		ir			: in  word_t;
 		ctrl_in		: in  cop0_ctrl_in_t;
 		ctrl_out	: out cop0_ctrl_out_t;
-		reg_rd		: out STD_LOGIC;
 		din			: in  word_t;
 		dout		: out word_t
 	);
@@ -120,8 +119,6 @@ begin
 	ctrl_out.user_mode				<= status(1);
 	ctrl_out.int					<= eflags.Int;
 
-	reg_rd							<= cop_pipe_ID.cs and cop_pipe_ID.re after 1 ns;
-	
 	im				<= status(15 downto 8);
 	cause			<= bd & (30 downto 16 => '0') & ip & '0' & exc_code & "00";
 
@@ -175,13 +172,13 @@ exception_state:
 		when exc_commit_EX =>
 			ctrl_out.exc_pending	<= '1';
 			ctrl_out.exc_commit		<= '1';
-			if ctrl_in.sdu.EX_stall = '0' then
+			if ctrl_in.sdu.stall_all = '0' then
 				exc_staten				<= exc_commit_MEM;
 			end if;
 
 		when exc_commit_MEM =>
 			ctrl_out.exc_pending	<= '1';
-			if ctrl_in.sdu.MEM_stall = '0' then
+			if ctrl_in.sdu.stall_all = '0' then
 				epc_reg_we				<= '1';
 				exc_staten				<= exc_idle;
 			end if;
@@ -311,7 +308,7 @@ cop_pipe:
 				cop_pipe_EX.we	<= '0';
 				cop_pipe_EX.re	<= '0';
 			else
-				if ctrl_in.sdu.EX_stall = '0' then
+				if ctrl_in.sdu.stall_all = '0' then
 					cop_pipe_EX		<= cop_pipe_ID;
 				end if;
 			end if;
@@ -322,7 +319,7 @@ cop_register_read:
 	process(clk)
 	variable reg : word_t;
 	begin
-		if rising_edge(clk) and cop_pipe_ID.re = '1' and ctrl_in.sdu.ID_stall = '0' then
+		if rising_edge(clk) and cop_pipe_ID.re = '1' and ctrl_in.sdu.stall_all = '0' then
 			case cop_pipe_ID.rd is
 			when "01000" =>			-- BadVAddr
 				reg	:= BadVAddr;